xref: /openbmc/u-boot/arch/arm/mach-zynq/clk.c (revision 872cfa20)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2013 Soren Brinkmann <soren.brinkmann@xilinx.com>
4  * Copyright (C) 2013 Xilinx, Inc. All rights reserved.
5  */
6 #include <clk.h>
7 #include <common.h>
8 #include <dm.h>
9 #include <asm/arch/clk.h>
10 
11 DECLARE_GLOBAL_DATA_PTR;
12 
13 static const char * const clk_names[clk_max] = {
14 	"armpll", "ddrpll", "iopll",
15 	"cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x",
16 	"ddr2x", "ddr3x", "dci",
17 	"lqspi", "smc", "pcap", "gem0", "gem1",
18 	"fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
19 	"sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma",
20 	"usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper",
21 	"sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper",
22 	"can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
23 	"uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper",
24 	"smc_aper", "swdt", "dbg_trc", "dbg_apb"
25 };
26 
27 /**
28  * set_cpu_clk_info() - Setup clock information
29  *
30  * This function is called from common code after relocation and sets up the
31  * clock information.
32  */
33 int set_cpu_clk_info(void)
34 {
35 	struct clk clk;
36 	struct udevice *dev;
37 	ulong rate;
38 	int i, ret;
39 
40 	ret = uclass_get_device_by_driver(UCLASS_CLK,
41 		DM_GET_DRIVER(zynq_clk), &dev);
42 	if (ret)
43 		return ret;
44 
45 	for (i = 0; i < 2; i++) {
46 		clk.id = i ? ddr3x_clk : cpu_6or4x_clk;
47 		ret = clk_request(dev, &clk);
48 		if (ret < 0)
49 			return ret;
50 
51 		rate = clk_get_rate(&clk) / 1000000;
52 		if (i)
53 			gd->bd->bi_ddr_freq = rate;
54 		else
55 			gd->bd->bi_arm_freq = rate;
56 
57 		clk_free(&clk);
58 	}
59 	gd->bd->bi_dsp_freq = 0;
60 
61 	return 0;
62 }
63 
64 /**
65  * soc_clk_dump() - Print clock frequencies
66  * Returns zero on success
67  *
68  * Implementation for the clk dump command.
69  */
70 int soc_clk_dump(void)
71 {
72 	struct udevice *dev;
73 	int i, ret;
74 
75 	ret = uclass_get_device_by_driver(UCLASS_CLK,
76 		DM_GET_DRIVER(zynq_clk), &dev);
77 	if (ret)
78 		return ret;
79 
80 	printf("clk\t\tfrequency\n");
81 	for (i = 0; i < clk_max; i++) {
82 		const char *name = clk_names[i];
83 		if (name) {
84 			struct clk clk;
85 			unsigned long rate;
86 
87 			clk.id = i;
88 			ret = clk_request(dev, &clk);
89 			if (ret < 0)
90 				return ret;
91 
92 			rate = clk_get_rate(&clk);
93 
94 			clk_free(&clk);
95 
96 			if ((rate == (unsigned long)-ENOSYS) ||
97 			    (rate == (unsigned long)-ENXIO))
98 				printf("%10s%20s\n", name, "unknown");
99 			else
100 				printf("%10s%20lu\n", name, rate);
101 		}
102 	}
103 
104 	return 0;
105 }
106