1ec48b6c9SMichal Simek /* SPDX-License-Identifier: GPL-2.0+ */ 2ec48b6c9SMichal Simek /* 3ec48b6c9SMichal Simek * Copyright 2016 - 2018 Xilinx, Inc. 4ec48b6c9SMichal Simek */ 5ec48b6c9SMichal Simek 6*4244f2b7SSiva Durga Prasad Paladugu enum { 7*4244f2b7SSiva Durga Prasad Paladugu TCM_LOCK, 8*4244f2b7SSiva Durga Prasad Paladugu TCM_SPLIT, 9*4244f2b7SSiva Durga Prasad Paladugu }; 10*4244f2b7SSiva Durga Prasad Paladugu 11*4244f2b7SSiva Durga Prasad Paladugu void tcm_init(u8 mode); 12