1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
281c847bfSMasahiro Yamada /*
381c847bfSMasahiro Yamada  * Copyright (C) 2016 Socionext Inc.
481c847bfSMasahiro Yamada  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
581c847bfSMasahiro Yamada  */
681c847bfSMasahiro Yamada 
781c847bfSMasahiro Yamada #include <common.h>
881c847bfSMasahiro Yamada #include <mmc.h>
981c847bfSMasahiro Yamada #include <spl.h>
1081c847bfSMasahiro Yamada 
spl_boot_mode(const u32 boot_device)1181c847bfSMasahiro Yamada u32 spl_boot_mode(const u32 boot_device)
1281c847bfSMasahiro Yamada {
1381c847bfSMasahiro Yamada 	struct mmc *mmc;
1481c847bfSMasahiro Yamada 
1581c847bfSMasahiro Yamada 	/*
1600aa453eSMasahiro Yamada 	 * work around a bug in the Boot ROM of LD4, Pro4, and sLD8:
1781c847bfSMasahiro Yamada 	 *
1881c847bfSMasahiro Yamada 	 * The boot ROM in these SoCs breaks the PARTITION_CONFIG [179] of
1981c847bfSMasahiro Yamada 	 * Extended CSD register; when switching to the Boot Partition 1, the
2081c847bfSMasahiro Yamada 	 * Boot ROM should issue the SWITCH command (CMD6) with Set Bits for
2181c847bfSMasahiro Yamada 	 * the Access Bits, but in fact it uses Write Byte for the Access Bits.
2281c847bfSMasahiro Yamada 	 * As a result, the BOOT_PARTITION_ENABLE field of the PARTITION_CONFIG
2381c847bfSMasahiro Yamada 	 * is lost.  This bug was fixed for PH1-Pro5 and later SoCs.
2481c847bfSMasahiro Yamada 	 *
2581c847bfSMasahiro Yamada 	 * Fixup mmc->part_config here because it is used to determine the
2681c847bfSMasahiro Yamada 	 * partition which the U-Boot image is read from.
2781c847bfSMasahiro Yamada 	 */
2881c847bfSMasahiro Yamada 	mmc = find_mmc_device(0);
2981c847bfSMasahiro Yamada 	mmc->part_config &= ~EXT_CSD_BOOT_PART_NUM(PART_ACCESS_MASK);
3081c847bfSMasahiro Yamada 	mmc->part_config |= EXT_CSD_BOOT_PARTITION_ENABLE;
3181c847bfSMasahiro Yamada 
3281c847bfSMasahiro Yamada 	return MMCSD_MODE_EMMCBOOT;
3381c847bfSMasahiro Yamada }
34