1 /*
2  * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <linux/sizes.h>
9 #include <linux/io.h>
10 #include <mach/sg-regs.h>
11 
12 static inline u32 sg_memconf_val_ch0(unsigned long size, int num)
13 {
14 	int size_mb = size / num;
15 	u32 ret;
16 
17 	switch (size_mb) {
18 	case SZ_64M:
19 		ret = SG_MEMCONF_CH0_SZ_64M;
20 		break;
21 	case SZ_128M:
22 		ret = SG_MEMCONF_CH0_SZ_128M;
23 		break;
24 	case SZ_256M:
25 		ret = SG_MEMCONF_CH0_SZ_256M;
26 		break;
27 	case SZ_512M:
28 		ret = SG_MEMCONF_CH0_SZ_512M;
29 		break;
30 	case SZ_1G:
31 		ret = SG_MEMCONF_CH0_SZ_1G;
32 		break;
33 	default:
34 		BUG();
35 		break;
36 	}
37 
38 	switch (num) {
39 	case 1:
40 		ret |= SG_MEMCONF_CH0_NUM_1;
41 		break;
42 	case 2:
43 		ret |= SG_MEMCONF_CH0_NUM_2;
44 		break;
45 	default:
46 		BUG();
47 		break;
48 	}
49 	return ret;
50 }
51 
52 static inline u32 sg_memconf_val_ch1(unsigned long size, int num)
53 {
54 	int size_mb = size / num;
55 	u32 ret;
56 
57 	switch (size_mb) {
58 	case SZ_64M:
59 		ret = SG_MEMCONF_CH1_SZ_64M;
60 		break;
61 	case SZ_128M:
62 		ret = SG_MEMCONF_CH1_SZ_128M;
63 		break;
64 	case SZ_256M:
65 		ret = SG_MEMCONF_CH1_SZ_256M;
66 		break;
67 	case SZ_512M:
68 		ret = SG_MEMCONF_CH1_SZ_512M;
69 		break;
70 	case SZ_1G:
71 		ret = SG_MEMCONF_CH1_SZ_1G;
72 		break;
73 	default:
74 		BUG();
75 		break;
76 	}
77 
78 	switch (num) {
79 	case 1:
80 		ret |= SG_MEMCONF_CH1_NUM_1;
81 		break;
82 	case 2:
83 		ret |= SG_MEMCONF_CH1_NUM_2;
84 		break;
85 	default:
86 		BUG();
87 		break;
88 	}
89 	return ret;
90 }
91 
92 void memconf_init(void)
93 {
94 	u32 tmp;
95 
96 	/* Set DDR size */
97 	tmp = sg_memconf_val_ch0(CONFIG_SDRAM0_SIZE, CONFIG_DDR_NUM_CH0);
98 	tmp |= sg_memconf_val_ch1(CONFIG_SDRAM1_SIZE, CONFIG_DDR_NUM_CH1);
99 #if CONFIG_SDRAM0_BASE + CONFIG_SDRAM0_SIZE < CONFIG_SDRAM1_BASE
100 	tmp |= SG_MEMCONF_SPARSEMEM;
101 #endif
102 	writel(tmp, SG_MEMCONF);
103 }
104