1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2016-2018 Socionext Inc.
4  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5  */
6 
7 #include <common.h>
8 #include <fdt_support.h>
9 #include <fdtdec.h>
10 #include <jffs2/load_kernel.h>
11 #include <mtd_node.h>
12 #include <linux/kernel.h>
13 #include <linux/printk.h>
14 
15 #include "soc-info.h"
16 
17 /*
18  * The DRAM PHY requires 64 byte scratch area in each DRAM channel
19  * for its dynamic PHY training feature.
20  */
21 static int uniphier_ld20_fdt_mem_rsv(void *fdt, bd_t *bd)
22 {
23 	unsigned long rsv_addr;
24 	const unsigned long rsv_size = 64;
25 	int i, ret;
26 
27 	if (!IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD20) ||
28 	    uniphier_get_soc_id() != UNIPHIER_LD20_ID)
29 		return 0;
30 
31 	for (i = 0; i < ARRAY_SIZE(bd->bi_dram); i++) {
32 		if (!bd->bi_dram[i].size)
33 			continue;
34 
35 		rsv_addr = bd->bi_dram[i].start + bd->bi_dram[i].size;
36 		rsv_addr -= rsv_size;
37 
38 		ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size);
39 		if (ret)
40 			return -ENOSPC;
41 
42 		pr_notice("   Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n",
43 			  rsv_addr, rsv_size);
44 	}
45 
46 	return 0;
47 }
48 
49 int ft_board_setup(void *fdt, bd_t *bd)
50 {
51 	static const struct node_info nodes[] = {
52 		{ "socionext,uniphier-denali-nand-v5a", MTD_DEV_TYPE_NAND },
53 		{ "socionext,uniphier-denali-nand-v5b", MTD_DEV_TYPE_NAND },
54 	};
55 	int ret;
56 
57 	fdt_fixup_mtdparts(fdt, nodes, ARRAY_SIZE(nodes));
58 
59 	ret = uniphier_ld20_fdt_mem_rsv(fdt, bd);
60 	if (ret)
61 		return ret;
62 
63 	return 0;
64 }
65