1 /*
2  * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <libfdt.h>
9 #include <fdtdec.h>
10 #include <linux/err.h>
11 
12 #include "init.h"
13 #include "soc-info.h"
14 
15 DECLARE_GLOBAL_DATA_PTR;
16 
17 static const void *get_memory_reg_prop(const void *fdt, int *lenp)
18 {
19 	int offset;
20 
21 	offset = fdt_path_offset(fdt, "/memory");
22 	if (offset < 0)
23 		return NULL;
24 
25 	return fdt_getprop(fdt, offset, "reg", lenp);
26 }
27 
28 int dram_init(void)
29 {
30 	const void *fdt = gd->fdt_blob;
31 	const fdt32_t *val;
32 	int ac, sc, len;
33 
34 	ac = fdt_address_cells(fdt, 0);
35 	sc = fdt_size_cells(fdt, 0);
36 	if (ac < 0 || sc < 1 || sc > 2) {
37 		printf("invalid address/size cells\n");
38 		return -EINVAL;
39 	}
40 
41 	val = get_memory_reg_prop(fdt, &len);
42 	if (len / sizeof(*val) < ac + sc)
43 		return -EINVAL;
44 
45 	val += ac;
46 
47 	gd->ram_size = fdtdec_get_number(val, sc);
48 
49 	debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size);
50 
51 	return 0;
52 }
53 
54 void dram_init_banksize(void)
55 {
56 	const void *fdt = gd->fdt_blob;
57 	const fdt32_t *val;
58 	int ac, sc, cells, len, i;
59 
60 	val = get_memory_reg_prop(fdt, &len);
61 	if (len < 0)
62 		return;
63 
64 	ac = fdt_address_cells(fdt, 0);
65 	sc = fdt_size_cells(fdt, 0);
66 	if (ac < 1 || sc > 2 || sc < 1 || sc > 2) {
67 		printf("invalid address/size cells\n");
68 		return;
69 	}
70 
71 	cells = ac + sc;
72 
73 	len /= sizeof(*val);
74 
75 	for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells;
76 	     i++, len -= cells) {
77 		gd->bd->bi_dram[i].start = fdtdec_get_number(val, ac);
78 		val += ac;
79 		gd->bd->bi_dram[i].size = fdtdec_get_number(val, sc);
80 		val += sc;
81 
82 		debug("DRAM bank %d: start = %08lx, size = %08lx\n",
83 		      i, (unsigned long)gd->bd->bi_dram[i].start,
84 		      (unsigned long)gd->bd->bi_dram[i].size);
85 	}
86 }
87 
88 #ifdef CONFIG_OF_BOARD_SETUP
89 /*
90  * The DRAM PHY requires 64 byte scratch area in each DRAM channel
91  * for its dynamic PHY training feature.
92  */
93 int ft_board_setup(void *fdt, bd_t *bd)
94 {
95 	const struct uniphier_board_data *param;
96 	unsigned long rsv_addr;
97 	const unsigned long rsv_size = 64;
98 	int ch, ret;
99 
100 	if (uniphier_get_soc_type() != SOC_UNIPHIER_LD20)
101 		return 0;
102 
103 	param = uniphier_get_board_param();
104 	if (!param) {
105 		printf("failed to get board parameter\n");
106 		return -ENODEV;
107 	}
108 
109 	for (ch = 0; ch < param->dram_nr_ch; ch++) {
110 		rsv_addr = param->dram_ch[ch].base + param->dram_ch[ch].size;
111 		rsv_addr -= rsv_size;
112 
113 		ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size);
114 		if (ret)
115 			return -ENOSPC;
116 
117 		printf("   Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n",
118 		       rsv_addr, rsv_size);
119 	}
120 
121 	return 0;
122 }
123 #endif
124