xref: /openbmc/u-boot/arch/arm/mach-uniphier/clk/pll.h (revision 85231c08)
1 /*
2  * Copyright (C) 2016 Socionext Inc.
3  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef MACH_PLL_H
9 #define MACH_PLL_H
10 
11 #define UNIPHIER_PLL_FREQ_DEFAULT	(0)
12 
13 void uniphier_ld4_dpll_ssc_en(void);
14 
15 int uniphier_ld20_sscpll_init(unsigned long reg_base, unsigned int freq,
16 			      unsigned int ssc_rate, unsigned int divn);
17 int uniphier_ld20_sscpll_ssc_en(unsigned long reg_base);
18 int uniphier_ld20_sscpll_set_regi(unsigned long reg_base, unsigned regi);
19 int uniphier_ld20_vpll27_init(unsigned long reg_base);
20 int uniphier_ld20_dspll_init(unsigned long reg_base);
21 
22 #endif /* MACH_PLL_H */
23