1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 281afa9c9SMasahiro Yamada /* 381afa9c9SMasahiro Yamada * Copyright (C) 2017 Socionext Inc. 481afa9c9SMasahiro Yamada */ 581afa9c9SMasahiro Yamada 6a184fb8eSMasahiro Yamada #include <linux/bitops.h> 781afa9c9SMasahiro Yamada #include <linux/io.h> 881afa9c9SMasahiro Yamada 981afa9c9SMasahiro Yamada #include "../init.h" 10a184fb8eSMasahiro Yamada #include "../sc64-regs.h" 1181afa9c9SMasahiro Yamada 1281afa9c9SMasahiro Yamada #define SDCTRL_EMMC_HW_RESET 0x59810280 1381afa9c9SMasahiro Yamada uniphier_pxs3_clk_init(void)1481afa9c9SMasahiro Yamadavoid uniphier_pxs3_clk_init(void) 1581afa9c9SMasahiro Yamada { 16a184fb8eSMasahiro Yamada u32 tmp; 17a184fb8eSMasahiro Yamada 18a184fb8eSMasahiro Yamada tmp = readl(SC_RSTCTRL6); 19a184fb8eSMasahiro Yamada tmp |= BIT(8); /* Mali */ 20a184fb8eSMasahiro Yamada writel(tmp, SC_RSTCTRL6); 21a184fb8eSMasahiro Yamada 22a184fb8eSMasahiro Yamada tmp = readl(SC_CLKCTRL6); 23a184fb8eSMasahiro Yamada tmp |= BIT(8); /* Mali */ 24a184fb8eSMasahiro Yamada writel(tmp, SC_CLKCTRL6); 25a184fb8eSMasahiro Yamada 2681afa9c9SMasahiro Yamada /* TODO: use "mmc-pwrseq-emmc" */ 2781afa9c9SMasahiro Yamada writel(1, SDCTRL_EMMC_HW_RESET); 2881afa9c9SMasahiro Yamada } 29