1*00aa453eSMasahiro Yamada /*
2*00aa453eSMasahiro Yamada  * Copyright (C) 2011-2014 Panasonic Corporation
3*00aa453eSMasahiro Yamada  * Copyright (C) 2015-2017 Socionext Inc.
4*00aa453eSMasahiro Yamada  *
5*00aa453eSMasahiro Yamada  * SPDX-License-Identifier:	GPL-2.0+
6*00aa453eSMasahiro Yamada  */
7*00aa453eSMasahiro Yamada 
8*00aa453eSMasahiro Yamada #include <common.h>
9*00aa453eSMasahiro Yamada #include <spl.h>
10*00aa453eSMasahiro Yamada #include <linux/io.h>
11*00aa453eSMasahiro Yamada 
12*00aa453eSMasahiro Yamada #include "../init.h"
13*00aa453eSMasahiro Yamada #include "../sc-regs.h"
14*00aa453eSMasahiro Yamada 
15*00aa453eSMasahiro Yamada void uniphier_ld4_dram_clk_init(void)
16*00aa453eSMasahiro Yamada {
17*00aa453eSMasahiro Yamada 	u32 tmp;
18*00aa453eSMasahiro Yamada 
19*00aa453eSMasahiro Yamada 	/* deassert reset */
20*00aa453eSMasahiro Yamada 	tmp = readl(SC_RSTCTRL);
21*00aa453eSMasahiro Yamada 	tmp |= SC_RSTCTRL_NRST_UMC1 | SC_RSTCTRL_NRST_UMC0;
22*00aa453eSMasahiro Yamada 	writel(tmp, SC_RSTCTRL);
23*00aa453eSMasahiro Yamada 	readl(SC_RSTCTRL); /* dummy read */
24*00aa453eSMasahiro Yamada 
25*00aa453eSMasahiro Yamada 	/* provide clocks */
26*00aa453eSMasahiro Yamada 	tmp = readl(SC_CLKCTRL);
27*00aa453eSMasahiro Yamada 	tmp |= SC_CLKCTRL_CEN_UMC;
28*00aa453eSMasahiro Yamada 	writel(tmp, SC_CLKCTRL);
29*00aa453eSMasahiro Yamada 	readl(SC_CLKCTRL); /* dummy read */
30*00aa453eSMasahiro Yamada }
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