xref: /openbmc/u-boot/arch/arm/mach-uniphier/boards.c (revision ed4708aa)
1 /*
2  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <libfdt.h>
9 #include <linux/kernel.h>
10 
11 #include "init.h"
12 
13 DECLARE_GLOBAL_DATA_PTR;
14 
15 #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
16 static const struct uniphier_board_data uniphier_sld3_data = {
17 	.dram_freq = 1600,
18 	.dram_nr_ch = 3,
19 	.dram_ch[0] = {
20 		.base = 0x80000000,
21 		.size = 0x20000000,
22 		.width = 32,
23 	},
24 	.dram_ch[1] = {
25 		.base = 0xc0000000,
26 		.size = 0x20000000,
27 		.width = 16,
28 	},
29 	.dram_ch[2] = {
30 		.base = 0xc0000000,
31 		.size = 0x10000000,
32 		.width = 16,
33 	},
34 };
35 #endif
36 
37 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
38 static const struct uniphier_board_data uniphier_ld4_data = {
39 	.dram_freq = 1600,
40 	.dram_nr_ch = 2,
41 	.dram_ddr3plus = true,
42 	.dram_ch[0] = {
43 		.base = 0x80000000,
44 		.size = 0x10000000,
45 		.width = 16,
46 	},
47 	.dram_ch[1] = {
48 		.base = 0x90000000,
49 		.size = 0x10000000,
50 		.width = 16,
51 	},
52 };
53 #endif
54 
55 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
56 /* 1GB RAM board */
57 static const struct uniphier_board_data uniphier_pro4_data = {
58 	.dram_freq = 1600,
59 	.dram_nr_ch = 2,
60 	.dram_ch[0] = {
61 		.base = 0x80000000,
62 		.size = 0x20000000,
63 		.width = 32,
64 	},
65 	.dram_ch[1] = {
66 		.base = 0xa0000000,
67 		.size = 0x20000000,
68 		.width = 32,
69 	},
70 };
71 
72 /* 2GB RAM board */
73 static const struct uniphier_board_data uniphier_pro4_2g_data = {
74 	.dram_freq = 1600,
75 	.dram_nr_ch = 2,
76 	.dram_ch[0] = {
77 		.base = 0x80000000,
78 		.size = 0x40000000,
79 		.width = 32,
80 	},
81 	.dram_ch[1] = {
82 		.base = 0xc0000000,
83 		.size = 0x40000000,
84 		.width = 32,
85 	},
86 };
87 #endif
88 
89 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
90 static const struct uniphier_board_data uniphier_sld8_data = {
91 	.dram_freq = 1333,
92 	.dram_nr_ch = 2,
93 	.dram_ddr3plus = true,
94 	.dram_ch[0] = {
95 		.base = 0x80000000,
96 		.size = 0x10000000,
97 		.width = 16,
98 	},
99 	.dram_ch[1] = {
100 		.base = 0x90000000,
101 		.size = 0x10000000,
102 		.width = 16,
103 	},
104 };
105 #endif
106 
107 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
108 static const struct uniphier_board_data uniphier_pro5_data = {
109 	.dram_freq = 1866,
110 	.dram_nr_ch = 2,
111 	.dram_ch[0] = {
112 		.base = 0x80000000,
113 		.size = 0x20000000,
114 		.width = 32,
115 	},
116 	.dram_ch[1] = {
117 		.base = 0xa0000000,
118 		.size = 0x20000000,
119 		.width = 32,
120 	},
121 };
122 #endif
123 
124 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
125 static const struct uniphier_board_data uniphier_pxs2_data = {
126 	.dram_freq = 2133,
127 	.dram_nr_ch = 3,
128 	.dram_ch[0] = {
129 		.base = 0x80000000,
130 		.size = 0x40000000,
131 		.width = 32,
132 	},
133 	.dram_ch[1] = {
134 		.base = 0xc0000000,
135 		.size = 0x20000000,
136 		.width = 32,
137 	},
138 	.dram_ch[2] = {
139 		.base = 0xe0000000,
140 		.size = 0x20000000,
141 		.width = 16,
142 	},
143 };
144 #endif
145 
146 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
147 static const struct uniphier_board_data uniphier_ld6b_data = {
148 	.dram_freq = 1866,
149 	.dram_nr_ch = 3,
150 	.dram_ch[0] = {
151 		.base = 0x80000000,
152 		.size = 0x40000000,
153 		.width = 32,
154 	},
155 	.dram_ch[1] = {
156 		.base = 0xc0000000,
157 		.size = 0x20000000,
158 		.width = 32,
159 	},
160 	.dram_ch[2] = {
161 		.base = 0xe0000000,
162 		.size = 0x20000000,
163 		.width = 16,
164 	},
165 };
166 #endif
167 
168 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
169 static const struct uniphier_board_data uniphier_ld11_data = {
170 	.dram_freq = 1600,
171 	.dram_nr_ch = 2,
172 	.dram_ch[0] = {
173 		.base = 0x80000000,
174 		.size = 0x20000000,
175 		.width = 16,
176 	},
177 	.dram_ch[1] = {
178 		.base = 0xa0000000,
179 		.size = 0x20000000,
180 		.width = 16,
181 	},
182 };
183 #endif
184 
185 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
186 static const struct uniphier_board_data uniphier_ld20_data = {
187 	.dram_freq = 1866,
188 	.dram_nr_ch = 3,
189 	.dram_ch[0] = {
190 		.base = 0x80000000,
191 		.size = 0x40000000,
192 		.width = 32,
193 	},
194 	.dram_ch[1] = {
195 		.base = 0xc0000000,
196 		.size = 0x40000000,
197 		.width = 32,
198 	},
199 	.dram_ch[2] = {
200 		.base = 0x100000000UL,
201 		.size = 0x40000000,
202 		.width = 32,
203 	},
204 };
205 #endif
206 
207 struct uniphier_board_id {
208 	const char *compatible;
209 	const struct uniphier_board_data *param;
210 };
211 
212 static const struct uniphier_board_id uniphier_boards[] = {
213 #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
214 	{ "socionext,ph1-sld3", &uniphier_sld3_data, },
215 #endif
216 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
217 	{ "socionext,ph1-ld4", &uniphier_ld4_data, },
218 #endif
219 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
220 	{ "socionext,ph1-pro4-ace", &uniphier_pro4_2g_data, },
221 	{ "socionext,ph1-pro4-sanji", &uniphier_pro4_2g_data, },
222 	{ "socionext,ph1-pro4", &uniphier_pro4_data, },
223 #endif
224 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
225 	{ "socionext,ph1-sld8", &uniphier_sld8_data, },
226 #endif
227 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
228 	{ "socionext,ph1-pro5", &uniphier_pro5_data, },
229 #endif
230 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
231 	{ "socionext,proxstream2", &uniphier_pxs2_data, },
232 #endif
233 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
234 	{ "socionext,ph1-ld6b", &uniphier_ld6b_data, },
235 #endif
236 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
237 	{ "socionext,ph1-ld11", &uniphier_ld11_data, },
238 #endif
239 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
240 	{ "socionext,ph1-ld20", &uniphier_ld20_data, },
241 #endif
242 };
243 
244 const struct uniphier_board_data *uniphier_get_board_param(void)
245 {
246 	int i;
247 
248 	for (i = 0; i < ARRAY_SIZE(uniphier_boards); i++) {
249 		if (!fdt_node_check_compatible(gd->fdt_blob, 0,
250 					       uniphier_boards[i].compatible))
251 			return uniphier_boards[i].param;
252 	}
253 
254 	return NULL;
255 }
256