1 /* 2 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <libfdt.h> 9 #include <linux/kernel.h> 10 #include <mach/init.h> 11 12 DECLARE_GLOBAL_DATA_PTR; 13 14 #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) 15 static const struct uniphier_board_data ph1_sld3_data = { 16 .dram_ch0_base = 0x80000000, 17 .dram_ch0_size = 0x20000000, 18 .dram_ch0_width = 32, 19 .dram_ch1_base = 0xc0000000, 20 .dram_ch1_size = 0x20000000, 21 .dram_ch1_width = 16, 22 .dram_ch2_base = 0xc0000000, 23 .dram_ch2_size = 0x10000000, 24 .dram_ch2_width = 16, 25 .dram_freq = 1600, 26 }; 27 #endif 28 29 #if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) 30 static const struct uniphier_board_data ph1_ld4_data = { 31 .dram_ch0_base = 0x80000000, 32 .dram_ch0_size = 0x10000000, 33 .dram_ch0_width = 16, 34 .dram_ch1_base = 0x90000000, 35 .dram_ch1_size = 0x10000000, 36 .dram_ch1_width = 16, 37 .dram_freq = 1600, 38 }; 39 #endif 40 41 #if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) 42 static const struct uniphier_board_data ph1_pro4_data = { 43 .dram_ch0_base = 0x80000000, 44 .dram_ch0_size = 0x20000000, 45 .dram_ch0_width = 32, 46 .dram_ch1_base = 0xa0000000, 47 .dram_ch1_size = 0x20000000, 48 .dram_ch1_width = 32, 49 .dram_freq = 1600, 50 }; 51 #endif 52 53 #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) 54 static const struct uniphier_board_data ph1_sld8_data = { 55 .dram_ch0_base = 0x80000000, 56 .dram_ch0_size = 0x10000000, 57 .dram_ch0_width = 16, 58 .dram_ch1_base = 0x90000000, 59 .dram_ch1_size = 0x10000000, 60 .dram_ch1_width = 16, 61 .dram_freq = 1333, 62 }; 63 #endif 64 65 #if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) 66 static const struct uniphier_board_data ph1_pro5_data = { 67 .dram_ch0_base = 0x80000000, 68 .dram_ch0_size = 0x20000000, 69 .dram_ch0_width = 32, 70 .dram_ch1_base = 0xa0000000, 71 .dram_ch1_size = 0x20000000, 72 .dram_ch1_width = 32, 73 .dram_freq = 1866, 74 }; 75 #endif 76 77 #if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) 78 static const struct uniphier_board_data proxstream2_data = { 79 .dram_ch0_base = 0x80000000, 80 .dram_ch0_size = 0x40000000, 81 .dram_ch0_width = 32, 82 .dram_ch1_base = 0xc0000000, 83 .dram_ch1_size = 0x20000000, 84 .dram_ch1_width = 32, 85 .dram_ch2_base = 0xe0000000, 86 .dram_ch2_size = 0x20000000, 87 .dram_ch2_width = 16, 88 .dram_freq = 2133, 89 }; 90 #endif 91 92 #if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) 93 static const struct uniphier_board_data ph1_ld6b_data = { 94 .dram_ch0_base = 0x80000000, 95 .dram_ch0_size = 0x40000000, 96 .dram_ch0_width = 32, 97 .dram_ch1_base = 0xc0000000, 98 .dram_ch1_size = 0x20000000, 99 .dram_ch1_width = 32, 100 .dram_ch2_base = 0xe0000000, 101 .dram_ch2_size = 0x20000000, 102 .dram_ch2_width = 16, 103 .dram_freq = 1866, 104 }; 105 #endif 106 107 struct uniphier_board_id { 108 const char *compatible; 109 const struct uniphier_board_data *param; 110 }; 111 112 static const struct uniphier_board_id uniphier_boards[] = { 113 #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) 114 { "socionext,ph1-sld3", &ph1_sld3_data, }, 115 #endif 116 #if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) 117 { "socionext,ph1-ld4", &ph1_ld4_data, }, 118 #endif 119 #if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) 120 { "socionext,ph1-pro4", &ph1_pro4_data, }, 121 #endif 122 #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) 123 { "socionext,ph1-sld8", &ph1_sld8_data, }, 124 #endif 125 #if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) 126 { "socionext,ph1-pro5", &ph1_pro5_data, }, 127 #endif 128 #if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) 129 { "socionext,proxstream2", &proxstream2_data, }, 130 #endif 131 #if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) 132 { "socionext,ph1-ld6b", &ph1_ld6b_data, }, 133 #endif 134 }; 135 136 const struct uniphier_board_data *uniphier_get_board_param(void) 137 { 138 int i; 139 140 for (i = 0; i < ARRAY_SIZE(uniphier_boards); i++) { 141 if (!fdt_node_check_compatible(gd->fdt_blob, 0, 142 uniphier_boards[i].compatible)) 143 return uniphier_boards[i].param; 144 } 145 146 return NULL; 147 } 148