xref: /openbmc/u-boot/arch/arm/mach-uniphier/boards.c (revision 0edd82e2)
1 /*
2  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <libfdt.h>
9 #include <linux/kernel.h>
10 
11 #include "init.h"
12 
13 DECLARE_GLOBAL_DATA_PTR;
14 
15 #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
16 static const struct uniphier_board_data ph1_sld3_data = {
17 	.dram_ch0_base	= 0x80000000,
18 	.dram_ch0_size	= 0x20000000,
19 	.dram_ch0_width	= 32,
20 	.dram_ch1_base	= 0xc0000000,
21 	.dram_ch1_size	= 0x20000000,
22 	.dram_ch1_width	= 16,
23 	.dram_ch2_base	= 0xc0000000,
24 	.dram_ch2_size	= 0x10000000,
25 	.dram_ch2_width	= 16,
26 	.dram_freq	= 1600,
27 };
28 #endif
29 
30 #if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4)
31 static const struct uniphier_board_data ph1_ld4_data = {
32 	.dram_ch0_base	= 0x80000000,
33 	.dram_ch0_size	= 0x10000000,
34 	.dram_ch0_width	= 16,
35 	.dram_ch1_base	= 0x90000000,
36 	.dram_ch1_size	= 0x10000000,
37 	.dram_ch1_width	= 16,
38 	.dram_freq	= 1600,
39 };
40 #endif
41 
42 #if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
43 /* 1GB RAM board */
44 static const struct uniphier_board_data ph1_pro4_data = {
45 	.dram_ch0_base	= 0x80000000,
46 	.dram_ch0_size	= 0x20000000,
47 	.dram_ch0_width	= 32,
48 	.dram_ch1_base	= 0xa0000000,
49 	.dram_ch1_size	= 0x20000000,
50 	.dram_ch1_width	= 32,
51 	.dram_freq	= 1600,
52 };
53 
54 /* 2GB RAM board */
55 static const struct uniphier_board_data ph1_pro4_2g_data = {
56 	.dram_ch0_base	= 0x80000000,
57 	.dram_ch0_size	= 0x40000000,
58 	.dram_ch0_width	= 32,
59 	.dram_ch1_base	= 0xc0000000,
60 	.dram_ch1_size	= 0x40000000,
61 	.dram_ch1_width	= 32,
62 	.dram_freq	= 1600,
63 };
64 #endif
65 
66 #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
67 static const struct uniphier_board_data ph1_sld8_data = {
68 	.dram_ch0_base	= 0x80000000,
69 	.dram_ch0_size	= 0x10000000,
70 	.dram_ch0_width	= 16,
71 	.dram_ch1_base	= 0x90000000,
72 	.dram_ch1_size	= 0x10000000,
73 	.dram_ch1_width	= 16,
74 	.dram_freq	= 1333,
75 };
76 #endif
77 
78 #if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5)
79 static const struct uniphier_board_data ph1_pro5_data = {
80 	.dram_ch0_base  = 0x80000000,
81 	.dram_ch0_size  = 0x20000000,
82 	.dram_ch0_width = 32,
83 	.dram_ch1_base  = 0xa0000000,
84 	.dram_ch1_size  = 0x20000000,
85 	.dram_ch1_width = 32,
86 	.dram_freq      = 1866,
87 };
88 #endif
89 
90 #if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2)
91 static const struct uniphier_board_data proxstream2_data = {
92 	.dram_ch0_base  = 0x80000000,
93 	.dram_ch0_size  = 0x40000000,
94 	.dram_ch0_width = 32,
95 	.dram_ch1_base  = 0xc0000000,
96 	.dram_ch1_size  = 0x20000000,
97 	.dram_ch1_width = 32,
98 	.dram_ch2_base  = 0xe0000000,
99 	.dram_ch2_size  = 0x20000000,
100 	.dram_ch2_width = 16,
101 	.dram_freq      = 2133,
102 };
103 #endif
104 
105 #if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B)
106 static const struct uniphier_board_data ph1_ld6b_data = {
107 	.dram_ch0_base  = 0x80000000,
108 	.dram_ch0_size  = 0x40000000,
109 	.dram_ch0_width = 32,
110 	.dram_ch1_base  = 0xc0000000,
111 	.dram_ch1_size  = 0x20000000,
112 	.dram_ch1_width = 32,
113 	.dram_ch2_base  = 0xe0000000,
114 	.dram_ch2_size  = 0x20000000,
115 	.dram_ch2_width = 16,
116 	.dram_freq      = 1866,
117 };
118 #endif
119 
120 struct uniphier_board_id {
121 	const char *compatible;
122 	const struct uniphier_board_data *param;
123 };
124 
125 static const struct uniphier_board_id uniphier_boards[] = {
126 #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
127 	{ "socionext,ph1-sld3", &ph1_sld3_data, },
128 #endif
129 #if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4)
130 	{ "socionext,ph1-ld4", &ph1_ld4_data, },
131 #endif
132 #if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
133 	{ "socionext,ph1-pro4-ace", &ph1_pro4_2g_data, },
134 	{ "socionext,ph1-pro4-sanji", &ph1_pro4_2g_data, },
135 	{ "socionext,ph1-pro4", &ph1_pro4_data, },
136 #endif
137 #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
138 	{ "socionext,ph1-sld8", &ph1_sld8_data, },
139 #endif
140 #if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5)
141 	{ "socionext,ph1-pro5", &ph1_pro5_data, },
142 #endif
143 #if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2)
144 	{ "socionext,proxstream2", &proxstream2_data, },
145 #endif
146 #if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B)
147 	{ "socionext,ph1-ld6b", &ph1_ld6b_data, },
148 #endif
149 };
150 
151 const struct uniphier_board_data *uniphier_get_board_param(void)
152 {
153 	int i;
154 
155 	for (i = 0; i < ARRAY_SIZE(uniphier_boards); i++) {
156 		if (!fdt_node_check_compatible(gd->fdt_blob, 0,
157 					       uniphier_boards[i].compatible))
158 			return uniphier_boards[i].param;
159 	}
160 
161 	return NULL;
162 }
163