1*107b3fb4SMasahiro Yamada /* 2*107b3fb4SMasahiro Yamada * UniPhier BCU (Bus Control Unit) registers 3*107b3fb4SMasahiro Yamada * 4*107b3fb4SMasahiro Yamada * Copyright (C) 2011-2014 Panasonic Corporation 5*107b3fb4SMasahiro Yamada * 6*107b3fb4SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 7*107b3fb4SMasahiro Yamada */ 8*107b3fb4SMasahiro Yamada 9*107b3fb4SMasahiro Yamada #ifndef ARCH_BCU_REGS_H 10*107b3fb4SMasahiro Yamada #define ARCH_BCU_REGS_H 11*107b3fb4SMasahiro Yamada 12*107b3fb4SMasahiro Yamada #define BCU_BASE 0x50080000 13*107b3fb4SMasahiro Yamada 14*107b3fb4SMasahiro Yamada #define BCSCR(x) (BCU_BASE + 0x180 + (x) * 4) 15*107b3fb4SMasahiro Yamada #define BCSCR0 (BCSCR(0)) 16*107b3fb4SMasahiro Yamada #define BCSCR1 (BCSCR(1)) 17*107b3fb4SMasahiro Yamada #define BCSCR2 (BCSCR(2)) 18*107b3fb4SMasahiro Yamada #define BCSCR3 (BCSCR(3)) 19*107b3fb4SMasahiro Yamada #define BCSCR4 (BCSCR(4)) 20*107b3fb4SMasahiro Yamada #define BCSCR5 (BCSCR(5)) 21*107b3fb4SMasahiro Yamada 22*107b3fb4SMasahiro Yamada #define BCIPPCCHR(x) (BCU_BASE + 0x0280 + (x) * 4) 23*107b3fb4SMasahiro Yamada #define BCIPPCCHR0 (BCIPPCCHR(0)) 24*107b3fb4SMasahiro Yamada #define BCIPPCCHR1 (BCIPPCCHR(1)) 25*107b3fb4SMasahiro Yamada #define BCIPPCCHR2 (BCIPPCCHR(2)) 26*107b3fb4SMasahiro Yamada #define BCIPPCCHR3 (BCIPPCCHR(3)) 27*107b3fb4SMasahiro Yamada #define BCIPPCCHR4 (BCIPPCCHR(4)) 28*107b3fb4SMasahiro Yamada #define BCIPPCCHR5 (BCIPPCCHR(5)) 29*107b3fb4SMasahiro Yamada 30*107b3fb4SMasahiro Yamada #endif /* ARCH_BCU_REGS_H */ 31