1*ea65c980SMasahiro Yamada /* 2*ea65c980SMasahiro Yamada * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> 3*ea65c980SMasahiro Yamada * 4*ea65c980SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 5*ea65c980SMasahiro Yamada */ 6*ea65c980SMasahiro Yamada 7*ea65c980SMasahiro Yamada #include <linux/io.h> 8*ea65c980SMasahiro Yamada 9*ea65c980SMasahiro Yamada #include "../init.h" 10*ea65c980SMasahiro Yamada #include "bcu-regs.h" 11*ea65c980SMasahiro Yamada 12*ea65c980SMasahiro Yamada #define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x)) 13*ea65c980SMasahiro Yamada 14*ea65c980SMasahiro Yamada int ph1_ld4_bcu_init(const struct uniphier_board_data *bd) 15*ea65c980SMasahiro Yamada { 16*ea65c980SMasahiro Yamada int shift; 17*ea65c980SMasahiro Yamada 18*ea65c980SMasahiro Yamada writel(0x44444444, BCSCR0); /* 0x20000000-0x3fffffff: ASM bus */ 19*ea65c980SMasahiro Yamada writel(0x11111111, BCSCR2); /* 0x80000000-0x9fffffff: IPPC/IPPD-bus */ 20*ea65c980SMasahiro Yamada writel(0x11111111, BCSCR3); /* 0xa0000000-0xbfffffff: IPPC/IPPD-bus */ 21*ea65c980SMasahiro Yamada writel(0x11111111, BCSCR4); /* 0xc0000000-0xdfffffff: IPPC/IPPD-bus */ 22*ea65c980SMasahiro Yamada writel(0x11111111, BCSCR5); /* 0xe0000000-0Xffffffff: IPPC/IPPD-bus */ 23*ea65c980SMasahiro Yamada 24*ea65c980SMasahiro Yamada /* Specify DDR channel */ 25*ea65c980SMasahiro Yamada shift = (bd->dram_ch[1].base - bd->dram_ch[0].base) / 0x04000000 * 4; 26*ea65c980SMasahiro Yamada writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */ 27*ea65c980SMasahiro Yamada 28*ea65c980SMasahiro Yamada shift -= 32; 29*ea65c980SMasahiro Yamada writel(ch(shift), BCIPPCCHR3); /* 0xa0000000-0xbfffffff */ 30*ea65c980SMasahiro Yamada 31*ea65c980SMasahiro Yamada shift -= 32; 32*ea65c980SMasahiro Yamada writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */ 33*ea65c980SMasahiro Yamada 34*ea65c980SMasahiro Yamada return 0; 35*ea65c980SMasahiro Yamada } 36