1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 2ea65c980SMasahiro Yamada /* 3e94842faSMasahiro Yamada * Copyright (C) 2011-2014 Panasonic Corporation 4e94842faSMasahiro Yamada * Copyright (C) 2015-2016 Socionext Inc. 5e94842faSMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 6ea65c980SMasahiro Yamada */ 7ea65c980SMasahiro Yamada 8ea65c980SMasahiro Yamada #include <linux/io.h> 9ea65c980SMasahiro Yamada 10ea65c980SMasahiro Yamada #include "../init.h" 11ea65c980SMasahiro Yamada #include "bcu-regs.h" 12ea65c980SMasahiro Yamada 13ea65c980SMasahiro Yamada #define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x)) 14ea65c980SMasahiro Yamada uniphier_ld4_bcu_init(const struct uniphier_board_data * bd)15e94842faSMasahiro Yamadavoid uniphier_ld4_bcu_init(const struct uniphier_board_data *bd) 16ea65c980SMasahiro Yamada { 17ea65c980SMasahiro Yamada int shift; 18ea65c980SMasahiro Yamada 19ea65c980SMasahiro Yamada writel(0x44444444, BCSCR0); /* 0x20000000-0x3fffffff: ASM bus */ 20ea65c980SMasahiro Yamada writel(0x11111111, BCSCR2); /* 0x80000000-0x9fffffff: IPPC/IPPD-bus */ 21ea65c980SMasahiro Yamada writel(0x11111111, BCSCR3); /* 0xa0000000-0xbfffffff: IPPC/IPPD-bus */ 22ea65c980SMasahiro Yamada writel(0x11111111, BCSCR4); /* 0xc0000000-0xdfffffff: IPPC/IPPD-bus */ 23ea65c980SMasahiro Yamada writel(0x11111111, BCSCR5); /* 0xe0000000-0Xffffffff: IPPC/IPPD-bus */ 24ea65c980SMasahiro Yamada 25ea65c980SMasahiro Yamada /* Specify DDR channel */ 2604cd4e72SMasahiro Yamada shift = bd->dram_ch[0].size / 0x04000000 * 4; 27ea65c980SMasahiro Yamada writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */ 28ea65c980SMasahiro Yamada 29ea65c980SMasahiro Yamada shift -= 32; 30ea65c980SMasahiro Yamada writel(ch(shift), BCIPPCCHR3); /* 0xa0000000-0xbfffffff */ 31ea65c980SMasahiro Yamada 32ea65c980SMasahiro Yamada shift -= 32; 33ea65c980SMasahiro Yamada writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */ 34ea65c980SMasahiro Yamada } 35