xref: /openbmc/u-boot/arch/arm/mach-tegra/tegra20/pmu.c (revision dd1033e4)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (c) 2011 The Chromium OS Authors.
4  * (C) Copyright 2010,2011 NVIDIA Corporation <www.nvidia.com>
5  */
6 
7 #include <common.h>
8 #include <i2c.h>
9 #include <tps6586x.h>
10 #include <asm/io.h>
11 #include <asm/arch/tegra.h>
12 #include <asm/arch-tegra/ap.h>
13 #include <asm/arch-tegra/tegra_i2c.h>
14 #include <asm/arch-tegra/sys_proto.h>
15 
16 #define VDD_CORE_NOMINAL_T25	0x17	/* 1.3v */
17 #define VDD_CPU_NOMINAL_T25	0x10	/* 1.125v */
18 
19 #define VDD_CORE_NOMINAL_T20	0x16	/* 1.275v */
20 #define VDD_CPU_NOMINAL_T20	0x0f	/* 1.1v */
21 
22 #define VDD_RELATION		0x02	/*  50mv */
23 #define VDD_TRANSITION_STEP	0x06	/* 150mv */
24 #define VDD_TRANSITION_RATE	0x06	/* 3.52mv/us */
25 
26 #define PMI_I2C_ADDRESS	0x34	/* chip requires this address */
27 
28 int pmu_set_nominal(void)
29 {
30 	struct udevice *bus, *dev;
31 	int core, cpu;
32 	int ret;
33 
34 	/* by default, the table has been filled with T25 settings */
35 	switch (tegra_get_chip_sku()) {
36 	case TEGRA_SOC_T20:
37 		core = VDD_CORE_NOMINAL_T20;
38 		cpu = VDD_CPU_NOMINAL_T20;
39 		break;
40 	case TEGRA_SOC_T25:
41 		core = VDD_CORE_NOMINAL_T25;
42 		cpu = VDD_CPU_NOMINAL_T25;
43 		break;
44 	default:
45 		debug("%s: Unknown SKU id\n", __func__);
46 		return -1;
47 	}
48 
49 	ret = tegra_i2c_get_dvc_bus(&bus);
50 	if (ret) {
51 		debug("%s: Cannot find DVC I2C bus\n", __func__);
52 		return ret;
53 	}
54 	ret = i2c_get_chip(bus, PMI_I2C_ADDRESS, 1, &dev);
55 	if (ret) {
56 		debug("%s: Cannot find DVC I2C chip\n", __func__);
57 		return ret;
58 	}
59 
60 	tps6586x_init(dev);
61 	tps6586x_set_pwm_mode(TPS6586X_PWM_SM1);
62 	return tps6586x_adjust_sm0_sm1(core, cpu, VDD_TRANSITION_STEP,
63 				VDD_TRANSITION_RATE, VDD_RELATION);
64 }
65