xref: /openbmc/u-boot/arch/arm/mach-tegra/tegra20/pmu.c (revision c978b524)
1 /*
2  * Copyright (c) 2011 The Chromium OS Authors.
3  * (C) Copyright 2010,2011 NVIDIA Corporation <www.nvidia.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #include <common.h>
9 #include <i2c.h>
10 #include <tps6586x.h>
11 #include <asm/io.h>
12 #include <asm/arch/tegra.h>
13 #include <asm/arch-tegra/ap.h>
14 #include <asm/arch-tegra/tegra_i2c.h>
15 #include <asm/arch-tegra/sys_proto.h>
16 
17 #define VDD_CORE_NOMINAL_T25	0x17	/* 1.3v */
18 #define VDD_CPU_NOMINAL_T25	0x10	/* 1.125v */
19 
20 #define VDD_CORE_NOMINAL_T20	0x16	/* 1.275v */
21 #define VDD_CPU_NOMINAL_T20	0x0f	/* 1.1v */
22 
23 #define VDD_RELATION		0x02	/*  50mv */
24 #define VDD_TRANSITION_STEP	0x06	/* 150mv */
25 #define VDD_TRANSITION_RATE	0x06	/* 3.52mv/us */
26 
27 #define PMI_I2C_ADDRESS	0x34	/* chip requires this address */
28 
29 int pmu_set_nominal(void)
30 {
31 	struct udevice *bus, *dev;
32 	int core, cpu;
33 	int ret;
34 
35 	/* by default, the table has been filled with T25 settings */
36 	switch (tegra_get_chip_sku()) {
37 	case TEGRA_SOC_T20:
38 		core = VDD_CORE_NOMINAL_T20;
39 		cpu = VDD_CPU_NOMINAL_T20;
40 		break;
41 	case TEGRA_SOC_T25:
42 		core = VDD_CORE_NOMINAL_T25;
43 		cpu = VDD_CPU_NOMINAL_T25;
44 		break;
45 	default:
46 		debug("%s: Unknown SKU id\n", __func__);
47 		return -1;
48 	}
49 
50 	ret = tegra_i2c_get_dvc_bus(&bus);
51 	if (ret) {
52 		debug("%s: Cannot find DVC I2C bus\n", __func__);
53 		return ret;
54 	}
55 	ret = i2c_get_chip(bus, PMI_I2C_ADDRESS, 1, &dev);
56 	if (ret) {
57 		debug("%s: Cannot find DVC I2C chip\n", __func__);
58 		return ret;
59 	}
60 
61 	tps6586x_init(dev);
62 	tps6586x_set_pwm_mode(TPS6586X_PWM_SM1);
63 	return tps6586x_adjust_sm0_sm1(core, cpu, VDD_TRANSITION_STEP,
64 				VDD_TRANSITION_RATE, VDD_RELATION);
65 }
66