1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. 4 */ 5 6 /* Tegra114 high-level function multiplexing */ 7 8 #include <common.h> 9 #include <asm/arch/clock.h> 10 #include <asm/arch/funcmux.h> 11 #include <asm/arch/pinmux.h> 12 13 int funcmux_select(enum periph_id id, int config) 14 { 15 int bad_config = config != FUNCMUX_DEFAULT; 16 17 switch (id) { 18 case PERIPH_ID_UART4: 19 switch (config) { 20 case FUNCMUX_UART4_GMI: 21 pinmux_set_func(PMUX_PINGRP_GMI_A16_PJ7, 22 PMUX_FUNC_UARTD); 23 pinmux_set_func(PMUX_PINGRP_GMI_A17_PB0, 24 PMUX_FUNC_UARTD); 25 pinmux_set_func(PMUX_PINGRP_GMI_A18_PB1, 26 PMUX_FUNC_UARTD); 27 pinmux_set_func(PMUX_PINGRP_GMI_A19_PK7, 28 PMUX_FUNC_UARTD); 29 30 pinmux_set_io(PMUX_PINGRP_GMI_A16_PJ7, PMUX_PIN_OUTPUT); 31 pinmux_set_io(PMUX_PINGRP_GMI_A17_PB0, PMUX_PIN_INPUT); 32 pinmux_set_io(PMUX_PINGRP_GMI_A18_PB1, PMUX_PIN_INPUT); 33 pinmux_set_io(PMUX_PINGRP_GMI_A19_PK7, PMUX_PIN_OUTPUT); 34 35 pinmux_tristate_disable(PMUX_PINGRP_GMI_A16_PJ7); 36 pinmux_tristate_disable(PMUX_PINGRP_GMI_A17_PB0); 37 pinmux_tristate_disable(PMUX_PINGRP_GMI_A18_PB1); 38 pinmux_tristate_disable(PMUX_PINGRP_GMI_A19_PK7); 39 break; 40 } 41 break; 42 43 /* Add other periph IDs here as needed */ 44 45 default: 46 debug("%s: invalid periph_id %d", __func__, id); 47 return -1; 48 } 49 50 if (bad_config) { 51 debug("%s: invalid config %d for periph_id %d", __func__, 52 config, id); 53 return -1; 54 } 55 return 0; 56 } 57