109f455dcSMasahiro Yamadaif TEGRA 209f455dcSMasahiro Yamada 353b5bf3cSSimon Glassconfig SPL_GPIO_SUPPORT 453b5bf3cSSimon Glass default y 553b5bf3cSSimon Glass 677d2f7f5SSimon Glassconfig SPL_LIBCOMMON_SUPPORT 777d2f7f5SSimon Glass default y 877d2f7f5SSimon Glass 9cc4288efSSimon Glassconfig SPL_LIBGENERIC_SUPPORT 10cc4288efSSimon Glass default y 11cc4288efSSimon Glass 12e00f76ceSSimon Glassconfig SPL_SERIAL_SUPPORT 13e00f76ceSSimon Glass default y 14e00f76ceSSimon Glass 1549626ea8SStephen Warrenconfig TEGRA_IVC 1649626ea8SStephen Warren bool "Tegra IVC protocol" 1749626ea8SStephen Warren help 1849626ea8SStephen Warren IVC (Inter-VM Communication) protocol is a Tegra-specific IPC 1949626ea8SStephen Warren (Inter Processor Communication) framework. Within the context of 2049626ea8SStephen Warren U-Boot, it is typically used for communication between the main CPU 2149626ea8SStephen Warren and various auxiliary processors. 2249626ea8SStephen Warren 2315bcc62dSStephen Warrenconfig TEGRA_COMMON 2415bcc62dSStephen Warren bool "Tegra common options" 25140a9eafSStephen Warren select CLK 2656079eccSTom Warren select DM 2796350f72SSimon Glass select DM_ETH 2856079eccSTom Warren select DM_GPIO 2915bcc62dSStephen Warren select DM_I2C 30f77f5e9bSSimon Glass select DM_KEYBOARD 316a474db4STom Warren select DM_MMC 3291c08afeSSimon Glass select DM_PWM 33140a9eafSStephen Warren select DM_RESET 3415bcc62dSStephen Warren select DM_SERIAL 3515bcc62dSStephen Warren select DM_SPI 3615bcc62dSStephen Warren select DM_SPI_FLASH 37140a9eafSStephen Warren select MISC 3815bcc62dSStephen Warren select OF_CONTROL 39d6ef8a61SSimon Glass select VIDCONSOLE_AS_LCD if DM_VIDEO 40a5d67547SSimon Glass select BOARD_EARLY_INIT_F 41f2faffecSSimon Glass select BINMAN 42221a949eSDaniel Thompson imply CRC32_VERIFY 4315bcc62dSStephen Warren 44140a9eafSStephen Warrenconfig TEGRA_NO_BPMP 45140a9eafSStephen Warren bool "Tegra common options for SoCs without BPMP" 46140a9eafSStephen Warren select TEGRA_CAR 47140a9eafSStephen Warren select TEGRA_CAR_CLOCK 48140a9eafSStephen Warren select TEGRA_CAR_RESET 49140a9eafSStephen Warren 5015bcc62dSStephen Warrenconfig TEGRA_ARMV7_COMMON 5115bcc62dSStephen Warren bool "Tegra 32-bit common options" 5215bcc62dSStephen Warren select CPU_V7 5315bcc62dSStephen Warren select SPL 540680f1b1SLey Foon Tan select SPL_BOARD_INIT if SPL 5515bcc62dSStephen Warren select SUPPORT_SPL 5615bcc62dSStephen Warren select TEGRA_COMMON 57601800beSStephen Warren select TEGRA_GPIO 58140a9eafSStephen Warren select TEGRA_NO_BPMP 5915bcc62dSStephen Warren 6015bcc62dSStephen Warrenconfig TEGRA_ARMV8_COMMON 6115bcc62dSStephen Warren bool "Tegra 64-bit common options" 6215bcc62dSStephen Warren select ARM64 63*ddecaaf3SStephen Warren select LINUX_KERNEL_IMAGE_HEADER 6415bcc62dSStephen Warren select TEGRA_COMMON 6556079eccSTom Warren 66*ddecaaf3SStephen Warrenif TEGRA_ARMV8_COMMON 67*ddecaaf3SStephen Warrenconfig LNX_KRNL_IMG_TEXT_OFFSET_BASE 68*ddecaaf3SStephen Warren default 0x80000000 69*ddecaaf3SStephen Warrenendif 70*ddecaaf3SStephen Warren 7109f455dcSMasahiro Yamadachoice 7209f455dcSMasahiro Yamada prompt "Tegra SoC select" 73a26cd049SJoe Hershberger optional 7409f455dcSMasahiro Yamada 7509f455dcSMasahiro Yamadaconfig TEGRA20 7609f455dcSMasahiro Yamada bool "Tegra20 family" 778dda2e2fSTom Rini select ARM_ERRATA_716044 788dda2e2fSTom Rini select ARM_ERRATA_742230 798dda2e2fSTom Rini select ARM_ERRATA_751472 8056079eccSTom Warren select TEGRA_ARMV7_COMMON 8109f455dcSMasahiro Yamada 8209f455dcSMasahiro Yamadaconfig TEGRA30 8309f455dcSMasahiro Yamada bool "Tegra30 family" 848dda2e2fSTom Rini select ARM_ERRATA_743622 858dda2e2fSTom Rini select ARM_ERRATA_751472 8656079eccSTom Warren select TEGRA_ARMV7_COMMON 8709f455dcSMasahiro Yamada 8809f455dcSMasahiro Yamadaconfig TEGRA114 8909f455dcSMasahiro Yamada bool "Tegra114 family" 9056079eccSTom Warren select TEGRA_ARMV7_COMMON 9109f455dcSMasahiro Yamada 9209f455dcSMasahiro Yamadaconfig TEGRA124 9309f455dcSMasahiro Yamada bool "Tegra124 family" 9456079eccSTom Warren select TEGRA_ARMV7_COMMON 9566de3eeeSSimon Glass imply REGMAP 9666de3eeeSSimon Glass imply SYSCON 9709f455dcSMasahiro Yamada 987aaa5a60STom Warrenconfig TEGRA210 997aaa5a60STom Warren bool "Tegra210 family" 100601800beSStephen Warren select TEGRA_GPIO 10115bcc62dSStephen Warren select TEGRA_ARMV8_COMMON 102140a9eafSStephen Warren select TEGRA_NO_BPMP 1037aaa5a60STom Warren 104c7ba99c8SStephen Warrenconfig TEGRA186 105c7ba99c8SStephen Warren bool "Tegra186 family" 1060f67e239SStephen Warren select DM_MAILBOX 10773dd5c4cSStephen Warren select TEGRA186_BPMP 108d9fd7008SStephen Warren select TEGRA186_CLOCK 109c7ba99c8SStephen Warren select TEGRA186_GPIO 1104dd99d14SStephen Warren select TEGRA186_RESET 111c7ba99c8SStephen Warren select TEGRA_ARMV8_COMMON 1120f67e239SStephen Warren select TEGRA_HSP 11349626ea8SStephen Warren select TEGRA_IVC 114c7ba99c8SStephen Warren 11509f455dcSMasahiro Yamadaendchoice 11609f455dcSMasahiro Yamada 117dd8204deSStephen Warrenconfig TEGRA_DISCONNECT_UDC_ON_BOOT 118dd8204deSStephen Warren bool "Disconnect USB device mode controller on boot" 119dd8204deSStephen Warren default y 120dd8204deSStephen Warren help 121dd8204deSStephen Warren When loading U-Boot into RAM over USB protocols using tools such as 122dd8204deSStephen Warren tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device 123dd8204deSStephen Warren mode controller is initialized and enumerated by the host PC running 124dd8204deSStephen Warren the tool. Unfortunately, these tools do not shut down the USB 125dd8204deSStephen Warren controller before executing the downloaded code, and so the host PC 126dd8204deSStephen Warren does not "de-enumerate" the USB device. This option shuts down the 127dd8204deSStephen Warren USB controller when U-Boot boots to avoid leaving a stale USB device 128dd8204deSStephen Warren present. 129dd8204deSStephen Warren 13009f455dcSMasahiro Yamadaconfig SYS_MALLOC_F_LEN 13109f455dcSMasahiro Yamada default 0x1800 13209f455dcSMasahiro Yamada 13309f455dcSMasahiro Yamadasource "arch/arm/mach-tegra/tegra20/Kconfig" 13409f455dcSMasahiro Yamadasource "arch/arm/mach-tegra/tegra30/Kconfig" 13509f455dcSMasahiro Yamadasource "arch/arm/mach-tegra/tegra114/Kconfig" 13609f455dcSMasahiro Yamadasource "arch/arm/mach-tegra/tegra124/Kconfig" 1377aaa5a60STom Warrensource "arch/arm/mach-tegra/tegra210/Kconfig" 138c7ba99c8SStephen Warrensource "arch/arm/mach-tegra/tegra186/Kconfig" 13909f455dcSMasahiro Yamada 14042e6f852SSimon Glassconfig CMD_ENTERRCM 14142e6f852SSimon Glass bool "Enable 'enterrcm' command" 14242e6f852SSimon Glass default y 14342e6f852SSimon Glass help 14442e6f852SSimon Glass Tegra's boot ROM supports a mode whereby code may be downloaded and 14542e6f852SSimon Glass flash-programmed over a USB connection. On dev boards, this is 14642e6f852SSimon Glass typically entered by holding down a "force recovery" button and 14742e6f852SSimon Glass resetting the CPU. However, not all boards have such a button (one 14842e6f852SSimon Glass example is the Compulab Trimslice), so a method to enter RCM from 14942e6f852SSimon Glass software is useful. 15042e6f852SSimon Glass 15142e6f852SSimon Glass Even on boards other than Trimslice, controlling this over a UART 15242e6f852SSimon Glass may be useful, e.g. to allow simple remote control without the need 15342e6f852SSimon Glass for mechanical button actuators, or hooking up relays/... to the 15442e6f852SSimon Glass button. 15542e6f852SSimon Glass 15609f455dcSMasahiro Yamadaendif 157