1 /* 2 * Sunxi A31 Power Management Unit 3 * 4 * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> 5 * http://linux-sunxi.org 6 * 7 * Based on sun6i sources and earlier U-Boot Allwinner A10 SPL work 8 * 9 * (C) Copyright 2006-2013 10 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 11 * Berg Xing <bergxing@allwinnertech.com> 12 * Tom Cubie <tangliang@allwinnertech.com> 13 * 14 * SPDX-License-Identifier: GPL-2.0+ 15 */ 16 17 #include <common.h> 18 #include <errno.h> 19 #include <asm/io.h> 20 #include <asm/arch/cpu.h> 21 #include <asm/arch/prcm.h> 22 #include <asm/arch/sys_proto.h> 23 24 /* APB0 clock gate and reset bit offsets are the same. */ 25 void prcm_apb0_enable(u32 flags) 26 { 27 struct sunxi_prcm_reg *prcm = 28 (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE; 29 30 /* open the clock for module */ 31 setbits_le32(&prcm->apb0_gate, flags); 32 33 /* deassert reset for module */ 34 setbits_le32(&prcm->apb0_reset, flags); 35 } 36 37 void prcm_apb0_disable(u32 flags) 38 { 39 struct sunxi_prcm_reg *prcm = 40 (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE; 41 42 /* assert reset for module */ 43 clrbits_le32(&prcm->apb0_reset, flags); 44 45 /* close the clock for module */ 46 clrbits_le32(&prcm->apb0_gate, flags); 47 } 48