1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 2e6e505b9SAlexander Graf /* 3e6e505b9SAlexander Graf * Sunxi A31 Power Management Unit 4e6e505b9SAlexander Graf * 5e6e505b9SAlexander Graf * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> 6e6e505b9SAlexander Graf * http://linux-sunxi.org 7e6e505b9SAlexander Graf * 8e6e505b9SAlexander Graf * Based on sun6i sources and earlier U-Boot Allwinner A10 SPL work 9e6e505b9SAlexander Graf * 10e6e505b9SAlexander Graf * (C) Copyright 2006-2013 11e6e505b9SAlexander Graf * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 12e6e505b9SAlexander Graf * Berg Xing <bergxing@allwinnertech.com> 13e6e505b9SAlexander Graf * Tom Cubie <tangliang@allwinnertech.com> 14e6e505b9SAlexander Graf */ 15e6e505b9SAlexander Graf 16e6e505b9SAlexander Graf #include <common.h> 17e6e505b9SAlexander Graf #include <errno.h> 18e6e505b9SAlexander Graf #include <asm/io.h> 19e6e505b9SAlexander Graf #include <asm/arch/cpu.h> 20e6e505b9SAlexander Graf #include <asm/arch/prcm.h> 21e6e505b9SAlexander Graf #include <asm/arch/sys_proto.h> 22e6e505b9SAlexander Graf 23e6e505b9SAlexander Graf /* APB0 clock gate and reset bit offsets are the same. */ prcm_apb0_enable(u32 flags)24e6e505b9SAlexander Grafvoid prcm_apb0_enable(u32 flags) 25e6e505b9SAlexander Graf { 26e6e505b9SAlexander Graf struct sunxi_prcm_reg *prcm = 27e6e505b9SAlexander Graf (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE; 28e6e505b9SAlexander Graf 29e6e505b9SAlexander Graf /* open the clock for module */ 30e6e505b9SAlexander Graf setbits_le32(&prcm->apb0_gate, flags); 31e6e505b9SAlexander Graf 32e6e505b9SAlexander Graf /* deassert reset for module */ 33e6e505b9SAlexander Graf setbits_le32(&prcm->apb0_reset, flags); 34e6e505b9SAlexander Graf } 35e6e505b9SAlexander Graf prcm_apb0_disable(u32 flags)36e6e505b9SAlexander Grafvoid prcm_apb0_disable(u32 flags) 37e6e505b9SAlexander Graf { 38e6e505b9SAlexander Graf struct sunxi_prcm_reg *prcm = 39e6e505b9SAlexander Graf (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE; 40e6e505b9SAlexander Graf 41e6e505b9SAlexander Graf /* assert reset for module */ 42e6e505b9SAlexander Graf clrbits_le32(&prcm->apb0_reset, flags); 43e6e505b9SAlexander Graf 44e6e505b9SAlexander Graf /* close the clock for module */ 45e6e505b9SAlexander Graf clrbits_le32(&prcm->apb0_gate, flags); 46e6e505b9SAlexander Graf } 47