xref: /openbmc/u-boot/arch/arm/mach-sunxi/pmic_bus.c (revision 6e87ae1c)
1 /*
2  * (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
3  *
4  * Sunxi PMIC bus access helpers
5  *
6  * The axp152 & axp209 use an i2c bus, the axp221 uses the p2wi bus and the
7  * axp223 uses the rsb bus, these functions abstract this.
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  */
11 
12 #include <common.h>
13 #include <asm/arch/p2wi.h>
14 #include <asm/arch/rsb.h>
15 #include <i2c.h>
16 #include <asm/arch/pmic_bus.h>
17 
18 #define AXP152_I2C_ADDR			0x30
19 
20 #define AXP209_I2C_ADDR			0x34
21 
22 #define AXP221_CHIP_ADDR		0x68
23 #define AXP221_CTRL_ADDR		0x3e
24 #define AXP221_INIT_DATA		0x3e
25 
26 /* AXP818 device and runtime addresses are same as AXP223 */
27 #define AXP223_DEVICE_ADDR		0x3a3
28 #define AXP223_RUNTIME_ADDR		0x2d
29 
30 int pmic_bus_init(void)
31 {
32 	/* This cannot be 0 because it is used in SPL before BSS is ready */
33 	static int needs_init = 1;
34 	__maybe_unused int ret;
35 
36 	if (!needs_init)
37 		return 0;
38 
39 #if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
40 # ifdef CONFIG_MACH_SUN6I
41 	p2wi_init();
42 	ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR,
43 				       AXP221_INIT_DATA);
44 # elif defined CONFIG_MACH_SUN8I_R40
45 	/* Nothing. R40 uses the AXP221s in I2C mode */
46 	ret = 0;
47 # else
48 	ret = rsb_init();
49 	if (ret)
50 		return ret;
51 
52 	ret = rsb_set_device_address(AXP223_DEVICE_ADDR, AXP223_RUNTIME_ADDR);
53 # endif
54 	if (ret)
55 		return ret;
56 #endif
57 
58 	needs_init = 0;
59 	return 0;
60 }
61 
62 int pmic_bus_read(u8 reg, u8 *data)
63 {
64 #ifdef CONFIG_AXP152_POWER
65 	return i2c_read(AXP152_I2C_ADDR, reg, 1, data, 1);
66 #elif defined CONFIG_AXP209_POWER
67 	return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1);
68 #elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
69 # ifdef CONFIG_MACH_SUN6I
70 	return p2wi_read(reg, data);
71 # elif defined CONFIG_MACH_SUN8I_R40
72 	return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1);
73 # else
74 	return rsb_read(AXP223_RUNTIME_ADDR, reg, data);
75 # endif
76 #endif
77 }
78 
79 int pmic_bus_write(u8 reg, u8 data)
80 {
81 #ifdef CONFIG_AXP152_POWER
82 	return i2c_write(AXP152_I2C_ADDR, reg, 1, &data, 1);
83 #elif defined CONFIG_AXP209_POWER
84 	return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1);
85 #elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
86 # ifdef CONFIG_MACH_SUN6I
87 	return p2wi_write(reg, data);
88 # elif defined CONFIG_MACH_SUN8I_R40
89 	return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1);
90 # else
91 	return rsb_write(AXP223_RUNTIME_ADDR, reg, data);
92 # endif
93 #endif
94 }
95 
96 int pmic_bus_setbits(u8 reg, u8 bits)
97 {
98 	int ret;
99 	u8 val;
100 
101 	ret = pmic_bus_read(reg, &val);
102 	if (ret)
103 		return ret;
104 
105 	val |= bits;
106 	return pmic_bus_write(reg, val);
107 }
108 
109 int pmic_bus_clrbits(u8 reg, u8 bits)
110 {
111 	int ret;
112 	u8 val;
113 
114 	ret = pmic_bus_read(reg, &val);
115 	if (ret)
116 		return ret;
117 
118 	val &= ~bits;
119 	return pmic_bus_write(reg, val);
120 }
121