1 /* 2 * (C) Copyright 2007-2012 3 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 4 * Tom Cubie <tangliang@allwinnertech.com> 5 * 6 * (C) Copyright 2013 Luke Kenneth Casson Leighton <lkcl@lkcl.net> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #include <common.h> 12 #include <asm/io.h> 13 #include <asm/arch/clock.h> 14 #include <asm/arch/gpio.h> 15 #include <asm/arch/prcm.h> 16 #include <asm/arch/sys_proto.h> 17 18 __weak void clock_init_sec(void) 19 { 20 } 21 22 int clock_init(void) 23 { 24 #ifdef CONFIG_SPL_BUILD 25 clock_init_safe(); 26 #endif 27 clock_init_uart(); 28 clock_init_sec(); 29 30 return 0; 31 } 32 33 /* These functions are shared between various SoCs so put them here. */ 34 #if defined CONFIG_SUNXI_GEN_SUN6I && !defined CONFIG_MACH_SUN9I 35 int clock_twi_onoff(int port, int state) 36 { 37 struct sunxi_ccm_reg *const ccm = 38 (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; 39 40 if (port == 5) { 41 if (state) 42 prcm_apb0_enable( 43 PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C); 44 else 45 prcm_apb0_disable( 46 PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C); 47 return 0; 48 } 49 50 /* set the apb clock gate and reset for twi */ 51 if (state) { 52 setbits_le32(&ccm->apb2_gate, 53 CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT + port)); 54 setbits_le32(&ccm->apb2_reset_cfg, 55 1 << (APB2_RESET_TWI_SHIFT + port)); 56 } else { 57 clrbits_le32(&ccm->apb2_reset_cfg, 58 1 << (APB2_RESET_TWI_SHIFT + port)); 59 clrbits_le32(&ccm->apb2_gate, 60 CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT + port)); 61 } 62 63 return 0; 64 } 65 #endif 66