1 /* 2 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause 5 */ 6 7 #ifndef _MACH_STM32_H_ 8 #define _MACH_STM32_H_ 9 10 /* 11 * Peripheral memory map 12 * only address used before device tree parsing 13 */ 14 #define STM32_RCC_BASE 0x50000000 15 #define STM32_PWR_BASE 0x50001000 16 #define STM32_DBGMCU_BASE 0x50081000 17 #define STM32_TZC_BASE 0x5C006000 18 #define STM32_ETZPC_BASE 0x5C007000 19 #define STM32_TAMP_BASE 0x5C00A000 20 21 #define STM32_SYSRAM_BASE 0x2FFC0000 22 #define STM32_SYSRAM_SIZE SZ_256K 23 24 #define STM32_DDR_BASE 0xC0000000 25 #define STM32_DDR_SIZE SZ_1G 26 27 #endif /* _MACH_STM32_H_ */ 28