xref: /openbmc/u-boot/arch/arm/mach-socfpga/system_manager_gen5.c (revision d024236e5a31a2b4b82cbcc98b31b8170fc88d28)
1 /*
2  * Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <asm/io.h>
9 #include <asm/arch/system_manager.h>
10 #include <asm/arch/fpga_manager.h>
11 
12 static struct socfpga_system_manager *sysmgr_regs =
13 	(struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
14 
15 /*
16  * Populate the value for SYSMGR.FPGAINTF.MODULE based on pinmux setting.
17  * The value is not wrote to SYSMGR.FPGAINTF.MODULE but
18  * CONFIG_SYSMGR_ISWGRP_HANDOFF.
19  */
20 static void populate_sysmgr_fpgaintf_module(void)
21 {
22 	u32 handoff_val = 0;
23 
24 	/* ISWGRP_HANDOFF_FPGAINTF */
25 	writel(0, &sysmgr_regs->iswgrp_handoff[2]);
26 
27 	/* Enable the signal for those HPS peripherals that use FPGA. */
28 	if (readl(&sysmgr_regs->nandusefpga) == SYSMGR_FPGAINTF_USEFPGA)
29 		handoff_val |= SYSMGR_FPGAINTF_NAND;
30 	if (readl(&sysmgr_regs->rgmii1usefpga) == SYSMGR_FPGAINTF_USEFPGA)
31 		handoff_val |= SYSMGR_FPGAINTF_EMAC1;
32 	if (readl(&sysmgr_regs->sdmmcusefpga) == SYSMGR_FPGAINTF_USEFPGA)
33 		handoff_val |= SYSMGR_FPGAINTF_SDMMC;
34 	if (readl(&sysmgr_regs->rgmii0usefpga) == SYSMGR_FPGAINTF_USEFPGA)
35 		handoff_val |= SYSMGR_FPGAINTF_EMAC0;
36 	if (readl(&sysmgr_regs->spim0usefpga) == SYSMGR_FPGAINTF_USEFPGA)
37 		handoff_val |= SYSMGR_FPGAINTF_SPIM0;
38 	if (readl(&sysmgr_regs->spim1usefpga) == SYSMGR_FPGAINTF_USEFPGA)
39 		handoff_val |= SYSMGR_FPGAINTF_SPIM1;
40 
41 	/* populate (not writing) the value for SYSMGR.FPGAINTF.MODULE
42 	based on pinmux setting */
43 	setbits_le32(&sysmgr_regs->iswgrp_handoff[2], handoff_val);
44 
45 	handoff_val = readl(&sysmgr_regs->iswgrp_handoff[2]);
46 	if (fpgamgr_test_fpga_ready()) {
47 		/* Enable the required signals only */
48 		writel(handoff_val, &sysmgr_regs->fpgaintfgrp_module);
49 	}
50 }
51 
52 /*
53  * Configure all the pin muxes
54  */
55 void sysmgr_pinmux_init(void)
56 {
57 	u32 regs = (u32)&sysmgr_regs->emacio[0];
58 	const u8 *sys_mgr_init_table;
59 	unsigned int len;
60 	int i;
61 
62 	sysmgr_get_pinmux_table(&sys_mgr_init_table, &len);
63 
64 	for (i = 0; i < len; i++) {
65 		writel(sys_mgr_init_table[i], regs);
66 		regs += sizeof(regs);
67 	}
68 
69 	populate_sysmgr_fpgaintf_module();
70 }
71 
72 /*
73  * This bit allows the bootrom to configure the IOs after a warm reset.
74  */
75 void sysmgr_config_warmrstcfgio(int enable)
76 {
77 	if (enable)
78 		setbits_le32(&sysmgr_regs->romcodegrp_ctrl,
79 			     SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO);
80 	else
81 		clrbits_le32(&sysmgr_regs->romcodegrp_ctrl,
82 			     SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO);
83 }
84