1 /* 2 * Copyright (C) 2013 Altera Corporation <www.altera.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <errno.h> 9 #include <asm/io.h> 10 #include <asm/arch/freeze_controller.h> 11 #include <asm/arch/scan_manager.h> 12 #include <asm/arch/system_manager.h> 13 14 /* 15 * Maximum polling loop to wait for IO scan chain engine becomes idle 16 * to prevent infinite loop. It is important that this is NOT changed 17 * to delay using timer functions, since at the time this function is 18 * called, timer might not yet be inited. 19 */ 20 #define SCANMGR_MAX_DELAY 100 21 22 /* 23 * Maximum length of TDI_TDO packet payload is 128 bits, 24 * represented by (length - 1) in TDI_TDO header. 25 */ 26 #define TDI_TDO_MAX_PAYLOAD 127 27 28 #define SCANMGR_STAT_ACTIVE (1 << 31) 29 #define SCANMGR_STAT_WFIFOCNT_MASK 0x70000000 30 31 static const struct socfpga_scan_manager *scan_manager_base = 32 (void *)(SOCFPGA_SCANMGR_ADDRESS); 33 static const struct socfpga_freeze_controller *freeze_controller_base = 34 (void *)(SOCFPGA_SYSMGR_ADDRESS + SYSMGR_FRZCTRL_ADDRESS); 35 static struct socfpga_system_manager *sys_mgr_base = 36 (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; 37 38 /** 39 * scan_chain_engine_is_idle() - Check if the JTAG scan chain is idle 40 * @max_iter: Maximum number of iterations to wait for idle 41 * 42 * Function to check IO scan chain engine status and wait if the engine is 43 * is active. Poll the IO scan chain engine till maximum iteration reached. 44 */ 45 static u32 scan_chain_engine_is_idle(u32 max_iter) 46 { 47 const u32 mask = SCANMGR_STAT_ACTIVE | SCANMGR_STAT_WFIFOCNT_MASK; 48 u32 status; 49 50 /* Poll the engine until the scan engine is inactive. */ 51 do { 52 status = readl(&scan_manager_base->stat); 53 if (!(status & mask)) 54 return 0; 55 } while (max_iter--); 56 57 return -ETIMEDOUT; 58 } 59 60 #define JTAG_BP_INSN (1 << 0) 61 #define JTAG_BP_TMS (1 << 1) 62 #define JTAG_BP_PAYLOAD (1 << 2) 63 #define JTAG_BP_2BYTE (1 << 3) 64 #define JTAG_BP_4BYTE (1 << 4) 65 66 /** 67 * scan_mgr_jtag_io() - Access the JTAG chain 68 * @flags: Control flags, used to configure the action on the JTAG 69 * @iarg: Instruction argument 70 * @parg: Payload argument or data 71 * 72 * Perform I/O on the JTAG chain 73 */ 74 static void scan_mgr_jtag_io(const u32 flags, const u8 iarg, const u32 parg) 75 { 76 u32 data = parg; 77 78 if (flags & JTAG_BP_INSN) { /* JTAG instruction */ 79 /* 80 * The SCC JTAG register is LSB first, so make 81 * space for the instruction at the LSB. 82 */ 83 data <<= 8; 84 if (flags & JTAG_BP_TMS) { 85 data |= (0 << 7); /* TMS instruction. */ 86 data |= iarg & 0x3f; /* TMS arg is 6 bits. */ 87 if (flags & JTAG_BP_PAYLOAD) 88 data |= (1 << 6); 89 } else { 90 data |= (1 << 7); /* TDI/TDO instruction. */ 91 data |= iarg & 0xf; /* TDI/TDO arg is 4 bits. */ 92 if (flags & JTAG_BP_PAYLOAD) 93 data |= (1 << 4); 94 } 95 } 96 97 if (flags & JTAG_BP_4BYTE) 98 writel(data, &scan_manager_base->fifo_quad_byte); 99 else if (flags & JTAG_BP_2BYTE) 100 writel(data & 0xffff, &scan_manager_base->fifo_double_byte); 101 else 102 writel(data & 0xff, &scan_manager_base->fifo_single_byte); 103 } 104 105 /** 106 * scan_mgr_jtag_insn_data() - Send JTAG instruction and data 107 * @iarg: Instruction argument 108 * @data: Associated data 109 * @dlen: Length of data in bits 110 * 111 * This function is used when programming the IO chains to submit the 112 * instruction followed by variable length payload. 113 */ 114 static int 115 scan_mgr_jtag_insn_data(const u8 iarg, const unsigned long *data, 116 const unsigned int dlen) 117 { 118 int i, j; 119 120 scan_mgr_jtag_io(JTAG_BP_INSN | JTAG_BP_2BYTE, iarg, dlen - 1); 121 122 /* 32 bits or more remain */ 123 for (i = 0; i < dlen / 32; i++) 124 scan_mgr_jtag_io(JTAG_BP_4BYTE, 0x0, data[i]); 125 126 if ((dlen % 32) > 24) { /* 31...24 bits remain */ 127 scan_mgr_jtag_io(JTAG_BP_4BYTE, 0x0, data[i]); 128 } else if (dlen % 32) { /* 24...1 bit remain */ 129 for (j = 0; j < dlen % 32; j += 8) 130 scan_mgr_jtag_io(0, 0x0, data[i] >> j); 131 } 132 133 return scan_chain_engine_is_idle(SCANMGR_MAX_DELAY); 134 } 135 136 /** 137 * scan_mgr_io_scan_chain_prg() - Program HPS IO Scan Chain 138 * @io_scan_chain_id: IO scan chain ID 139 */ 140 static int scan_mgr_io_scan_chain_prg(const unsigned int io_scan_chain_id) 141 { 142 u32 io_scan_chain_len_in_bits; 143 const unsigned long *iocsr_scan_chain; 144 unsigned int rem, idx = 0; 145 int ret; 146 147 ret = iocsr_get_config_table(io_scan_chain_id, &iocsr_scan_chain, 148 &io_scan_chain_len_in_bits); 149 if (ret) 150 return 1; 151 152 /* 153 * De-assert reinit if the IO scan chain is intended for HIO. In 154 * this, its the chain 3. 155 */ 156 if (io_scan_chain_id == 3) 157 clrbits_le32(&freeze_controller_base->hioctrl, 158 SYSMGR_FRZCTRL_HIOCTRL_DLLRST_MASK); 159 160 /* 161 * Check if the scan chain engine is inactive and the 162 * WFIFO is empty before enabling the IO scan chain 163 */ 164 ret = scan_chain_engine_is_idle(SCANMGR_MAX_DELAY); 165 if (ret) 166 return ret; 167 168 /* 169 * Enable IO Scan chain based on scan chain id 170 * Note: only one chain can be enabled at a time 171 */ 172 setbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id); 173 174 /* Program IO scan chain. */ 175 while (io_scan_chain_len_in_bits) { 176 if (io_scan_chain_len_in_bits > 128) 177 rem = 128; 178 else 179 rem = io_scan_chain_len_in_bits; 180 181 ret = scan_mgr_jtag_insn_data(0x0, &iocsr_scan_chain[idx], rem); 182 if (ret) 183 goto error; 184 io_scan_chain_len_in_bits -= rem; 185 idx += 4; 186 } 187 188 /* Disable IO Scan chain when configuration done*/ 189 clrbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id); 190 return 0; 191 192 error: 193 /* Disable IO Scan chain when error detected */ 194 clrbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id); 195 return ret; 196 } 197 198 int scan_mgr_configure_iocsr(void) 199 { 200 int status = 0; 201 202 /* configure the IOCSR through scan chain */ 203 status |= scan_mgr_io_scan_chain_prg(0); 204 status |= scan_mgr_io_scan_chain_prg(1); 205 status |= scan_mgr_io_scan_chain_prg(2); 206 status |= scan_mgr_io_scan_chain_prg(3); 207 return status; 208 } 209 210 /** 211 * scan_mgr_get_fpga_id() - Obtain FPGA JTAG ID 212 * 213 * This function obtains JTAG ID from the FPGA TAP controller. 214 */ 215 u32 scan_mgr_get_fpga_id(void) 216 { 217 const unsigned long data = 0; 218 u32 id = 0xffffffff; 219 int ret; 220 221 /* Enable HPS to talk to JTAG in the FPGA through the System Manager */ 222 writel(0x1, &sys_mgr_base->scanmgrgrp_ctrl); 223 224 /* Enable port 7 */ 225 writel(0x80, &scan_manager_base->en); 226 /* write to CSW to make s2f_ntrst reset */ 227 writel(0x02, &scan_manager_base->stat); 228 229 /* Add a pause */ 230 mdelay(1); 231 232 /* write 0x00 to CSW to clear the s2f_ntrst */ 233 writel(0, &scan_manager_base->stat); 234 235 /* 236 * Go to Test-Logic-Reset state. 237 * This sets TAP controller into IDCODE mode. 238 */ 239 scan_mgr_jtag_io(JTAG_BP_INSN | JTAG_BP_TMS, 0x1f | (1 << 5), 0x0); 240 241 /* Go to Run-Test/Idle -> DR-Scan -> Capture-DR -> Shift-DR state. */ 242 scan_mgr_jtag_io(JTAG_BP_INSN | JTAG_BP_TMS, 0x02 | (1 << 4), 0x0); 243 244 /* 245 * Push 4 bytes of data through TDI->DR->TDO. 246 * 247 * Length of TDI data is 32bits (length - 1) and they are only 248 * zeroes as we care only for TDO data. 249 */ 250 ret = scan_mgr_jtag_insn_data(0x4, &data, 32); 251 /* Read 32 bit from captured JTAG data. */ 252 if (!ret) 253 id = readl(&scan_manager_base->fifo_quad_byte); 254 255 /* Disable all port */ 256 writel(0, &scan_manager_base->en); 257 writel(0, &sys_mgr_base->scanmgrgrp_ctrl); 258 259 return id; 260 } 261