1 /* 2 * Copyright (C) 2012-2017 Altera Corporation <www.altera.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _RESET_MANAGER_H_ 8 #define _RESET_MANAGER_H_ 9 10 void reset_cpu(ulong addr); 11 12 void socfpga_per_reset(u32 reset, int set); 13 void socfpga_per_reset_all(void); 14 15 #if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) 16 #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2 17 #else 18 #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1 19 #endif 20 21 /* 22 * Define a reset identifier, from which a permodrst bank ID 23 * and reset ID can be extracted using the subsequent macros 24 * RSTMGR_RESET() and RSTMGR_BANK(). 25 */ 26 #define RSTMGR_BANK_OFFSET 8 27 #define RSTMGR_BANK_MASK 0x7 28 #define RSTMGR_RESET_OFFSET 0 29 #define RSTMGR_RESET_MASK 0x1f 30 #define RSTMGR_DEFINE(_bank, _offset) \ 31 ((_bank) << RSTMGR_BANK_OFFSET) | ((_offset) << RSTMGR_RESET_OFFSET) 32 33 /* Extract reset ID from the reset identifier. */ 34 #define RSTMGR_RESET(_reset) \ 35 (((_reset) >> RSTMGR_RESET_OFFSET) & RSTMGR_RESET_MASK) 36 37 /* Extract bank ID from the reset identifier. */ 38 #define RSTMGR_BANK(_reset) \ 39 (((_reset) >> RSTMGR_BANK_OFFSET) & RSTMGR_BANK_MASK) 40 41 /* Create a human-readable reference to SoCFPGA reset. */ 42 #define SOCFPGA_RESET(_name) RSTMGR_##_name 43 44 #if defined(CONFIG_TARGET_SOCFPGA_GEN5) 45 #include <asm/arch/reset_manager_gen5.h> 46 #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) 47 #include <asm/arch/reset_manager_arria10.h> 48 #endif 49 50 #endif /* _RESET_MANAGER_H_ */ 51