130088b09SMasahiro Yamada /* 2*2b09ea48SLey Foon Tan * Copyright (C) 2012-2017 Altera Corporation <www.altera.com> 330088b09SMasahiro Yamada * 430088b09SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 530088b09SMasahiro Yamada */ 630088b09SMasahiro Yamada 730088b09SMasahiro Yamada #ifndef _RESET_MANAGER_H_ 830088b09SMasahiro Yamada #define _RESET_MANAGER_H_ 930088b09SMasahiro Yamada 1030088b09SMasahiro Yamada void reset_cpu(ulong addr); 1130088b09SMasahiro Yamada 12bdfc2ef6SMarek Vasut void socfpga_per_reset(u32 reset, int set); 133191611aSMarek Vasut void socfpga_per_reset_all(void); 14bdfc2ef6SMarek Vasut 1530088b09SMasahiro Yamada #if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) 1630088b09SMasahiro Yamada #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2 1730088b09SMasahiro Yamada #else 1830088b09SMasahiro Yamada #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1 1930088b09SMasahiro Yamada #endif 2030088b09SMasahiro Yamada 211115cd2dSMarek Vasut /* 221115cd2dSMarek Vasut * Define a reset identifier, from which a permodrst bank ID 231115cd2dSMarek Vasut * and reset ID can be extracted using the subsequent macros 241115cd2dSMarek Vasut * RSTMGR_RESET() and RSTMGR_BANK(). 251115cd2dSMarek Vasut */ 261115cd2dSMarek Vasut #define RSTMGR_BANK_OFFSET 8 271115cd2dSMarek Vasut #define RSTMGR_BANK_MASK 0x7 281115cd2dSMarek Vasut #define RSTMGR_RESET_OFFSET 0 291115cd2dSMarek Vasut #define RSTMGR_RESET_MASK 0x1f 301115cd2dSMarek Vasut #define RSTMGR_DEFINE(_bank, _offset) \ 311115cd2dSMarek Vasut ((_bank) << RSTMGR_BANK_OFFSET) | ((_offset) << RSTMGR_RESET_OFFSET) 321115cd2dSMarek Vasut 331115cd2dSMarek Vasut /* Extract reset ID from the reset identifier. */ 341115cd2dSMarek Vasut #define RSTMGR_RESET(_reset) \ 351115cd2dSMarek Vasut (((_reset) >> RSTMGR_RESET_OFFSET) & RSTMGR_RESET_MASK) 361115cd2dSMarek Vasut 371115cd2dSMarek Vasut /* Extract bank ID from the reset identifier. */ 381115cd2dSMarek Vasut #define RSTMGR_BANK(_reset) \ 391115cd2dSMarek Vasut (((_reset) >> RSTMGR_BANK_OFFSET) & RSTMGR_BANK_MASK) 401115cd2dSMarek Vasut 411115cd2dSMarek Vasut /* Create a human-readable reference to SoCFPGA reset. */ 421115cd2dSMarek Vasut #define SOCFPGA_RESET(_name) RSTMGR_##_name 4330088b09SMasahiro Yamada 44*2b09ea48SLey Foon Tan #if defined(CONFIG_TARGET_SOCFPGA_GEN5) 45*2b09ea48SLey Foon Tan #include <asm/arch/reset_manager_gen5.h> 46*2b09ea48SLey Foon Tan #endif 47*2b09ea48SLey Foon Tan 4830088b09SMasahiro Yamada #endif /* _RESET_MANAGER_H_ */ 49