1 /*
2  * Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier:    BSD-3-Clause
6  */
7 
8 #ifndef	_FPGA_MANAGER_H_
9 #define	_FPGA_MANAGER_H_
10 
11 #include <altera.h>
12 
13 #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
14 #include <asm/arch/fpga_manager_gen5.h>
15 #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
16 #include <asm/arch/fpga_manager_arria10.h>
17 #endif
18 
19 /* FPGA CD Ratio Value */
20 #define CDRATIO_x1				0x0
21 #define CDRATIO_x2				0x1
22 #define CDRATIO_x4				0x2
23 #define CDRATIO_x8				0x3
24 
25 #ifndef __ASSEMBLY__
26 
27 /* Common prototypes */
28 int fpgamgr_get_mode(void);
29 int fpgamgr_poll_fpga_ready(void);
30 void fpgamgr_program_write(const void *rbf_data, size_t rbf_size);
31 int fpgamgr_test_fpga_ready(void);
32 int fpgamgr_dclkcnt_set(unsigned long cnt);
33 
34 #endif /* __ASSEMBLY__ */
35 #endif /* _FPGA_MANAGER_H_ */
36