1 /*
2  *  Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef _CLOCK_MANAGER_H_
8 #define _CLOCK_MANAGER_H_
9 
10 #ifndef __ASSEMBLER__
11 void cm_wait_for_lock(u32 mask);
12 int cm_wait_for_fsm(void);
13 void cm_print_clock_quick_summary(void);
14 #endif
15 
16 #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
17 #include <asm/arch/clock_manager_gen5.h>
18 #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
19 #include <asm/arch/clock_manager_arria10.h>
20 #endif
21 
22 #endif /* _CLOCK_MANAGER_H_ */
23