130088b09SMasahiro Yamada /* 2de778115SLey Foon Tan * Copyright (C) 2013-2017 Altera Corporation <www.altera.com> 330088b09SMasahiro Yamada * 430088b09SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 530088b09SMasahiro Yamada */ 630088b09SMasahiro Yamada 730088b09SMasahiro Yamada #ifndef _CLOCK_MANAGER_H_ 830088b09SMasahiro Yamada #define _CLOCK_MANAGER_H_ 930088b09SMasahiro Yamada 1030088b09SMasahiro Yamada #ifndef __ASSEMBLER__ 11de778115SLey Foon Tan void cm_wait_for_lock(u32 mask); 12de778115SLey Foon Tan int cm_wait_for_fsm(void); 13de778115SLey Foon Tan void cm_print_clock_quick_summary(void); 1430088b09SMasahiro Yamada #endif 1530088b09SMasahiro Yamada 16de778115SLey Foon Tan #if defined(CONFIG_TARGET_SOCFPGA_GEN5) 17de778115SLey Foon Tan #include <asm/arch/clock_manager_gen5.h> 18*177ba1f9SLey Foon Tan #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) 19*177ba1f9SLey Foon Tan #include <asm/arch/clock_manager_arria10.h> 20de778115SLey Foon Tan #endif 21*177ba1f9SLey Foon Tan 2230088b09SMasahiro Yamada #endif /* _CLOCK_MANAGER_H_ */ 23