183d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
230088b09SMasahiro Yamada /*
3de778115SLey Foon Tan  *  Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
430088b09SMasahiro Yamada  */
530088b09SMasahiro Yamada 
630088b09SMasahiro Yamada #ifndef _CLOCK_MANAGER_H_
730088b09SMasahiro Yamada #define _CLOCK_MANAGER_H_
830088b09SMasahiro Yamada 
930088b09SMasahiro Yamada #ifndef __ASSEMBLER__
10de778115SLey Foon Tan void cm_wait_for_lock(u32 mask);
11de778115SLey Foon Tan int cm_wait_for_fsm(void);
12de778115SLey Foon Tan void cm_print_clock_quick_summary(void);
1330088b09SMasahiro Yamada #endif
1430088b09SMasahiro Yamada 
15de778115SLey Foon Tan #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
16de778115SLey Foon Tan #include <asm/arch/clock_manager_gen5.h>
17177ba1f9SLey Foon Tan #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
18177ba1f9SLey Foon Tan #include <asm/arch/clock_manager_arria10.h>
19*508791a0SLey Foon Tan #elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
20*508791a0SLey Foon Tan #include <asm/arch/clock_manager_s10.h>
21de778115SLey Foon Tan #endif
22177ba1f9SLey Foon Tan 
2330088b09SMasahiro Yamada #endif /* _CLOCK_MANAGER_H_ */
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