1 /*
2  * Specialty padding for the Altera SoCFPGA preloader image
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef __BOOT0_H
8 #define __BOOT0_H
9 
10 #ifdef CONFIG_SPL_BUILD
11 #define ARM_SOC_BOOT0_HOOK						\
12 	.balignl 64,0xf33db33f;						\
13 									\
14 	.word	0x1337c0d3;	/* SoCFPGA preloader validation word */	\
15 	.word	0xc01df00d;	/* Version, flags, length */		\
16 	.word	0xcafec0d3;	/* Checksum, zero-pad */		\
17 	nop;								\
18 									\
19 	b reset;		/* SoCFPGA jumps here */		\
20 	nop;								\
21 	nop;								\
22 	nop;
23 #else
24 #define ARM_SOC_BOOT0_HOOK
25 #endif
26 
27 
28 #endif /* __BOOT0_H */
29