1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2016-2017 Intel Corporation <www.intel.com> 4 */ 5 6 #ifndef _SOCFPGA_S10_BASE_HARDWARE_H_ 7 #define _SOCFPGA_S10_BASE_HARDWARE_H_ 8 9 #define SOCFPGA_SDR_SCHEDULER_ADDRESS 0xf8000400 10 #define SOCFPGA_HMC_MMR_IO48_ADDRESS 0xf8010000 11 #define SOCFPGA_SDR_ADDRESS 0xf8011000 12 #define SOCFPGA_SMMU_ADDRESS 0xfa000000 13 #define SOCFPGA_MAILBOX_ADDRESS 0xffa30000 14 #define SOCFPGA_UART0_ADDRESS 0xffc02000 15 #define SOCFPGA_UART1_ADDRESS 0xffc02100 16 #define SOCFPGA_SPTIMER0_ADDRESS 0xffc03000 17 #define SOCFPGA_SPTIMER1_ADDRESS 0xffc03100 18 #define SOCFPGA_SYSTIMER0_ADDRESS 0xffd00000 19 #define SOCFPGA_SYSTIMER1_ADDRESS 0xffd00100 20 #define SOCFPGA_GTIMER_SEC_ADDRESS 0xffd01000 21 #define SOCFPGA_GTIMER_NSEC_ADDRESS 0xffd02000 22 #define SOCFPGA_CLKMGR_ADDRESS 0xffd10000 23 #define SOCFPGA_RSTMGR_ADDRESS 0xffd11000 24 #define SOCFPGA_SYSMGR_ADDRESS 0xffd12000 25 #define SOCFPGA_PINMUX_DEDICATED_IO_ADDRESS 0xffd13000 26 #define SOCFPGA_DMANONSECURE_ADDRESS 0xffda0000 27 #define SOCFPGA_DMASECURE_ADDRESS 0xffda1000 28 #define SOCFPGA_OCRAM_ADDRESS 0xffe00000 29 #define GICD_BASE 0xfffc1000 30 #define GICC_BASE 0xfffc2000 31 32 #endif /* _SOCFPGA_S10_BASE_HARDWARE_H_ */ 33