1if ARCH_SOCFPGA 2 3config SPL_LIBCOMMON_SUPPORT 4 default y 5 6config SPL_LIBDISK_SUPPORT 7 default y 8 9config SPL_LIBGENERIC_SUPPORT 10 default y 11 12config SPL_MMC_SUPPORT 13 default y if DM_MMC 14 15config SPL_NAND_SUPPORT 16 default y if SPL_NAND_DENALI 17 18config SPL_SERIAL_SUPPORT 19 default y 20 21config SPL_SPI_FLASH_SUPPORT 22 default y if SPL_SPI_SUPPORT 23 24config SPL_SPI_SUPPORT 25 default y if DM_SPI 26 27config SPL_WATCHDOG_SUPPORT 28 default y 29 30config SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE 31 default y 32 33config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE 34 default 0xa2 35 36config TARGET_SOCFPGA_ARRIA5 37 bool 38 select TARGET_SOCFPGA_GEN5 39 40config TARGET_SOCFPGA_CYCLONE5 41 bool 42 select TARGET_SOCFPGA_GEN5 43 44config TARGET_SOCFPGA_GEN5 45 bool 46 select ALTERA_SDRAM 47 48choice 49 prompt "Altera SOCFPGA board select" 50 optional 51 52config TARGET_SOCFPGA_ARRIA5_SOCDK 53 bool "Altera SOCFPGA SoCDK (Arria V)" 54 select TARGET_SOCFPGA_ARRIA5 55 56config TARGET_SOCFPGA_CYCLONE5_SOCDK 57 bool "Altera SOCFPGA SoCDK (Cyclone V)" 58 select TARGET_SOCFPGA_CYCLONE5 59 60config TARGET_SOCFPGA_ARIES_MCVEVK 61 bool "Aries MCVEVK (Cyclone V)" 62 select TARGET_SOCFPGA_CYCLONE5 63 64config TARGET_SOCFPGA_EBV_SOCRATES 65 bool "EBV SoCrates (Cyclone V)" 66 select TARGET_SOCFPGA_CYCLONE5 67 68config TARGET_SOCFPGA_IS1 69 bool "IS1 (Cyclone V)" 70 select TARGET_SOCFPGA_CYCLONE5 71 72config TARGET_SOCFPGA_SAMTEC_VINING_FPGA 73 bool "samtec VIN|ING FPGA (Cyclone V)" 74 select BOARD_LATE_INIT 75 select TARGET_SOCFPGA_CYCLONE5 76 77config TARGET_SOCFPGA_SR1500 78 bool "SR1500 (Cyclone V)" 79 select TARGET_SOCFPGA_CYCLONE5 80 81config TARGET_SOCFPGA_TERASIC_DE0_NANO 82 bool "Terasic DE0-Nano-Atlas (Cyclone V)" 83 select TARGET_SOCFPGA_CYCLONE5 84 85config TARGET_SOCFPGA_TERASIC_DE10_NANO 86 bool "Terasic DE10-Nano (Cyclone V)" 87 select TARGET_SOCFPGA_CYCLONE5 88 89config TARGET_SOCFPGA_TERASIC_DE1_SOC 90 bool "Terasic DE1-SoC (Cyclone V)" 91 select TARGET_SOCFPGA_CYCLONE5 92 93config TARGET_SOCFPGA_TERASIC_SOCKIT 94 bool "Terasic SoCkit (Cyclone V)" 95 select TARGET_SOCFPGA_CYCLONE5 96 97endchoice 98 99config SYS_BOARD 100 default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 101 default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 102 default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 103 default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC 104 default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO 105 default "is1" if TARGET_SOCFPGA_IS1 106 default "mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK 107 default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 108 default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES 109 default "sr1500" if TARGET_SOCFPGA_SR1500 110 default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 111 112config SYS_VENDOR 113 default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK 114 default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK 115 default "aries" if TARGET_SOCFPGA_ARIES_MCVEVK 116 default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES 117 default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 118 default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO 119 default "terasic" if TARGET_SOCFPGA_TERASIC_DE1_SOC 120 default "terasic" if TARGET_SOCFPGA_TERASIC_DE10_NANO 121 default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT 122 123config SYS_SOC 124 default "socfpga" 125 126config SYS_CONFIG_NAME 127 default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 128 default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 129 default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 130 default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC 131 default "socfpga_de10_nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO 132 default "socfpga_is1" if TARGET_SOCFPGA_IS1 133 default "socfpga_mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK 134 default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 135 default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES 136 default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500 137 default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 138 139endif 140