1if ARCH_SOCFPGA 2 3config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE 4 default 0xa2 5 6config TARGET_SOCFPGA_ARRIA5 7 bool 8 select TARGET_SOCFPGA_GEN5 9 10config TARGET_SOCFPGA_ARRIA10 11 bool 12 select ALTERA_SDRAM 13 select SPL_BOARD_INIT if SPL 14 15config TARGET_SOCFPGA_CYCLONE5 16 bool 17 select TARGET_SOCFPGA_GEN5 18 19config TARGET_SOCFPGA_GEN5 20 bool 21 select ALTERA_SDRAM 22 23config TARGET_SOCFPGA_STRATIX10 24 bool 25 select ARMV8_MULTIENTRY 26 select ARMV8_SET_SMPEN 27 select ARMV8_SPIN_TABLE 28 29choice 30 prompt "Altera SOCFPGA board select" 31 optional 32 33config TARGET_SOCFPGA_ARRIA10_SOCDK 34 bool "Altera SOCFPGA SoCDK (Arria 10)" 35 select TARGET_SOCFPGA_ARRIA10 36 37config TARGET_SOCFPGA_ARRIA5_SOCDK 38 bool "Altera SOCFPGA SoCDK (Arria V)" 39 select TARGET_SOCFPGA_ARRIA5 40 41config TARGET_SOCFPGA_CYCLONE5_SOCDK 42 bool "Altera SOCFPGA SoCDK (Cyclone V)" 43 select TARGET_SOCFPGA_CYCLONE5 44 45config TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1 46 bool "Devboards DBM-SoC1 (Cyclone V)" 47 select TARGET_SOCFPGA_CYCLONE5 48 49config TARGET_SOCFPGA_EBV_SOCRATES 50 bool "EBV SoCrates (Cyclone V)" 51 select TARGET_SOCFPGA_CYCLONE5 52 53config TARGET_SOCFPGA_IS1 54 bool "IS1 (Cyclone V)" 55 select TARGET_SOCFPGA_CYCLONE5 56 57config TARGET_SOCFPGA_SAMTEC_VINING_FPGA 58 bool "samtec VIN|ING FPGA (Cyclone V)" 59 select BOARD_LATE_INIT 60 select TARGET_SOCFPGA_CYCLONE5 61 62config TARGET_SOCFPGA_SR1500 63 bool "SR1500 (Cyclone V)" 64 select TARGET_SOCFPGA_CYCLONE5 65 66config TARGET_SOCFPGA_STRATIX10_SOCDK 67 bool "Intel SOCFPGA SoCDK (Stratix 10)" 68 select TARGET_SOCFPGA_STRATIX10 69 70config TARGET_SOCFPGA_TERASIC_DE0_NANO 71 bool "Terasic DE0-Nano-Atlas (Cyclone V)" 72 select TARGET_SOCFPGA_CYCLONE5 73 74config TARGET_SOCFPGA_TERASIC_DE10_NANO 75 bool "Terasic DE10-Nano (Cyclone V)" 76 select TARGET_SOCFPGA_CYCLONE5 77 78config TARGET_SOCFPGA_TERASIC_DE1_SOC 79 bool "Terasic DE1-SoC (Cyclone V)" 80 select TARGET_SOCFPGA_CYCLONE5 81 82config TARGET_SOCFPGA_TERASIC_SOCKIT 83 bool "Terasic SoCkit (Cyclone V)" 84 select TARGET_SOCFPGA_CYCLONE5 85 86endchoice 87 88config SYS_BOARD 89 default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 90 default "arria10-socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK 91 default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 92 default "dbm-soc1" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1 93 default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 94 default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC 95 default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO 96 default "is1" if TARGET_SOCFPGA_IS1 97 default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 98 default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES 99 default "sr1500" if TARGET_SOCFPGA_SR1500 100 default "stratix10-socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK 101 default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 102 103config SYS_VENDOR 104 default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK 105 default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK 106 default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK 107 default "altera" if TARGET_SOCFPGA_STRATIX10_SOCDK 108 default "devboards" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1 109 default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES 110 default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 111 default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO 112 default "terasic" if TARGET_SOCFPGA_TERASIC_DE1_SOC 113 default "terasic" if TARGET_SOCFPGA_TERASIC_DE10_NANO 114 default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT 115 116config SYS_SOC 117 default "socfpga" 118 119config SYS_CONFIG_NAME 120 default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 121 default "socfpga_arria10_socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK 122 default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 123 default "socfpga_dbm_soc1" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1 124 default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 125 default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC 126 default "socfpga_de10_nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO 127 default "socfpga_is1" if TARGET_SOCFPGA_IS1 128 default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 129 default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES 130 default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500 131 default "socfpga_stratix10_socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK 132 default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 133 134endif 135