17865f4b0SMasahiro Yamadaif ARCH_SOCFPGA 27865f4b0SMasahiro Yamada 377d2f7f5SSimon Glassconfig SPL_LIBCOMMON_SUPPORT 477d2f7f5SSimon Glass default y 577d2f7f5SSimon Glass 61646eba8SSimon Glassconfig SPL_LIBDISK_SUPPORT 71646eba8SSimon Glass default y 81646eba8SSimon Glass 9cc4288efSSimon Glassconfig SPL_LIBGENERIC_SUPPORT 10cc4288efSSimon Glass default y 11cc4288efSSimon Glass 121fdf7c64SSimon Glassconfig SPL_MMC_SUPPORT 131fdf7c64SSimon Glass default y if DM_MMC 141fdf7c64SSimon Glass 15d6b9bd89SSimon Glassconfig SPL_NAND_SUPPORT 16d6b9bd89SSimon Glass default y if SPL_NAND_DENALI 17d6b9bd89SSimon Glass 18e00f76ceSSimon Glassconfig SPL_SERIAL_SUPPORT 19e00f76ceSSimon Glass default y 20e00f76ceSSimon Glass 21e404ade4SSimon Glassconfig SPL_SPI_FLASH_SUPPORT 22*f35ed9edSSimon Glass default y if SPL_SPI_SUPPORT 23*f35ed9edSSimon Glass 24*f35ed9edSSimon Glassconfig SPL_SPI_SUPPORT 25e404ade4SSimon Glass default y if DM_SPI 26e404ade4SSimon Glass 27cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5 28cd9b7317SMarek Vasut bool 29ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 30cd9b7317SMarek Vasut 31cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5 32cd9b7317SMarek Vasut bool 33ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 34ed77aeb5SDinh Nguyen 35ed77aeb5SDinh Nguyenconfig TARGET_SOCFPGA_GEN5 36ed77aeb5SDinh Nguyen bool 37cd9b7317SMarek Vasut 387865f4b0SMasahiro Yamadachoice 397865f4b0SMasahiro Yamada prompt "Altera SOCFPGA board select" 40a26cd049SJoe Hershberger optional 417865f4b0SMasahiro Yamada 42cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5_SOCDK 43cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Arria V)" 44cd9b7317SMarek Vasut select TARGET_SOCFPGA_ARRIA5 457865f4b0SMasahiro Yamada 46cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5_SOCDK 47cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Cyclone V)" 48cd9b7317SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 497865f4b0SMasahiro Yamada 50d88995a8SMarek Vasutconfig TARGET_SOCFPGA_DENX_MCVEVK 51d88995a8SMarek Vasut bool "DENX MCVEVK (Cyclone V)" 52d88995a8SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 53d88995a8SMarek Vasut 54856b30daSMarek Vasutconfig TARGET_SOCFPGA_EBV_SOCRATES 55856b30daSMarek Vasut bool "EBV SoCrates (Cyclone V)" 56856b30daSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 57856b30daSMarek Vasut 5835546f6fSPavel Machekconfig TARGET_SOCFPGA_IS1 5935546f6fSPavel Machek bool "IS1 (Cyclone V)" 6035546f6fSPavel Machek select TARGET_SOCFPGA_CYCLONE5 6135546f6fSPavel Machek 62569a191aSMarek Vasutconfig TARGET_SOCFPGA_SAMTEC_VINING_FPGA 63569a191aSMarek Vasut bool "samtec VIN|ING FPGA (Cyclone V)" 64569a191aSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 65569a191aSMarek Vasut 66cf0a8dabSMarek Vasutconfig TARGET_SOCFPGA_SR1500 67cf0a8dabSMarek Vasut bool "SR1500 (Cyclone V)" 68cf0a8dabSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 69cf0a8dabSMarek Vasut 7055c7a765SDinh Nguyenconfig TARGET_SOCFPGA_TERASIC_DE0_NANO 7155c7a765SDinh Nguyen bool "Terasic DE0-Nano-Atlas (Cyclone V)" 7255c7a765SDinh Nguyen select TARGET_SOCFPGA_CYCLONE5 7355c7a765SDinh Nguyen 74952caa28SMarek Vasutconfig TARGET_SOCFPGA_TERASIC_SOCKIT 75952caa28SMarek Vasut bool "Terasic SoCkit (Cyclone V)" 76952caa28SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 77952caa28SMarek Vasut 787865f4b0SMasahiro Yamadaendchoice 797865f4b0SMasahiro Yamada 807865f4b0SMasahiro Yamadaconfig SYS_BOARD 81f0892401SMarek Vasut default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 82f0892401SMarek Vasut default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 8355c7a765SDinh Nguyen default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 8435546f6fSPavel Machek default "is1" if TARGET_SOCFPGA_IS1 85d88995a8SMarek Vasut default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK 86952caa28SMarek Vasut default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 87856b30daSMarek Vasut default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES 88ae9996c8SStefan Roese default "sr1500" if TARGET_SOCFPGA_SR1500 89569a191aSMarek Vasut default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 907865f4b0SMasahiro Yamada 917865f4b0SMasahiro Yamadaconfig SYS_VENDOR 92cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK 93cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK 94d88995a8SMarek Vasut default "denx" if TARGET_SOCFPGA_DENX_MCVEVK 95856b30daSMarek Vasut default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES 96569a191aSMarek Vasut default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 9755c7a765SDinh Nguyen default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO 98952caa28SMarek Vasut default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT 997865f4b0SMasahiro Yamada 1007865f4b0SMasahiro Yamadaconfig SYS_SOC 1017865f4b0SMasahiro Yamada default "socfpga" 1027865f4b0SMasahiro Yamada 1037865f4b0SMasahiro Yamadaconfig SYS_CONFIG_NAME 1043cbc7b87SDinh Nguyen default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 1053cbc7b87SDinh Nguyen default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 10655c7a765SDinh Nguyen default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 10735546f6fSPavel Machek default "socfpga_is1" if TARGET_SOCFPGA_IS1 108d88995a8SMarek Vasut default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK 109952caa28SMarek Vasut default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 110856b30daSMarek Vasut default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES 111ae9996c8SStefan Roese default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500 112569a191aSMarek Vasut default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 1137865f4b0SMasahiro Yamada 1147865f4b0SMasahiro Yamadaendif 115