17865f4b0SMasahiro Yamadaif ARCH_SOCFPGA 27865f4b0SMasahiro Yamada 377d2f7f5SSimon Glassconfig SPL_LIBCOMMON_SUPPORT 477d2f7f5SSimon Glass default y 577d2f7f5SSimon Glass 61646eba8SSimon Glassconfig SPL_LIBDISK_SUPPORT 71646eba8SSimon Glass default y 81646eba8SSimon Glass 9cc4288efSSimon Glassconfig SPL_LIBGENERIC_SUPPORT 10cc4288efSSimon Glass default y 11cc4288efSSimon Glass 121fdf7c64SSimon Glassconfig SPL_MMC_SUPPORT 131fdf7c64SSimon Glass default y if DM_MMC 141fdf7c64SSimon Glass 15d6b9bd89SSimon Glassconfig SPL_NAND_SUPPORT 16d6b9bd89SSimon Glass default y if SPL_NAND_DENALI 17d6b9bd89SSimon Glass 18e00f76ceSSimon Glassconfig SPL_SERIAL_SUPPORT 19e00f76ceSSimon Glass default y 20e00f76ceSSimon Glass 21e404ade4SSimon Glassconfig SPL_SPI_FLASH_SUPPORT 22f35ed9edSSimon Glass default y if SPL_SPI_SUPPORT 23f35ed9edSSimon Glass 24f35ed9edSSimon Glassconfig SPL_SPI_SUPPORT 25e404ade4SSimon Glass default y if DM_SPI 26e404ade4SSimon Glass 2702e69a5dSSimon Glassconfig SPL_WATCHDOG_SUPPORT 2802e69a5dSSimon Glass default y 2902e69a5dSSimon Glass 30f0fb4fa7SDalon Westergreenconfig SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE 31f0fb4fa7SDalon Westergreen default y 32f0fb4fa7SDalon Westergreen 33f0fb4fa7SDalon Westergreenconfig SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE 34f0fb4fa7SDalon Westergreen default 0xa2 35f0fb4fa7SDalon Westergreen 36cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5 37cd9b7317SMarek Vasut bool 38ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 39cd9b7317SMarek Vasut 40*d89e979cSLey Foon Tanconfig TARGET_SOCFPGA_ARRIA10 41*d89e979cSLey Foon Tan bool 42*d89e979cSLey Foon Tan 43cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5 44cd9b7317SMarek Vasut bool 45ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 46ed77aeb5SDinh Nguyen 47ed77aeb5SDinh Nguyenconfig TARGET_SOCFPGA_GEN5 48ed77aeb5SDinh Nguyen bool 49707cd012SLey Foon Tan select ALTERA_SDRAM 50cd9b7317SMarek Vasut 517865f4b0SMasahiro Yamadachoice 527865f4b0SMasahiro Yamada prompt "Altera SOCFPGA board select" 53a26cd049SJoe Hershberger optional 547865f4b0SMasahiro Yamada 55*d89e979cSLey Foon Tanconfig TARGET_SOCFPGA_ARRIA10_SOCDK 56*d89e979cSLey Foon Tan bool "Altera SOCFPGA SoCDK (Arria 10)" 57*d89e979cSLey Foon Tan select TARGET_SOCFPGA_ARRIA10 58*d89e979cSLey Foon Tan 59cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5_SOCDK 60cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Arria V)" 61cd9b7317SMarek Vasut select TARGET_SOCFPGA_ARRIA5 627865f4b0SMasahiro Yamada 63cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5_SOCDK 64cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Cyclone V)" 65cd9b7317SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 667865f4b0SMasahiro Yamada 67a548bc51SMarek Vasutconfig TARGET_SOCFPGA_ARIES_MCVEVK 68a548bc51SMarek Vasut bool "Aries MCVEVK (Cyclone V)" 69d88995a8SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 70d88995a8SMarek Vasut 71856b30daSMarek Vasutconfig TARGET_SOCFPGA_EBV_SOCRATES 72856b30daSMarek Vasut bool "EBV SoCrates (Cyclone V)" 73856b30daSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 74856b30daSMarek Vasut 7535546f6fSPavel Machekconfig TARGET_SOCFPGA_IS1 7635546f6fSPavel Machek bool "IS1 (Cyclone V)" 7735546f6fSPavel Machek select TARGET_SOCFPGA_CYCLONE5 7835546f6fSPavel Machek 79569a191aSMarek Vasutconfig TARGET_SOCFPGA_SAMTEC_VINING_FPGA 80569a191aSMarek Vasut bool "samtec VIN|ING FPGA (Cyclone V)" 81e5ec4815STom Rini select BOARD_LATE_INIT 82569a191aSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 83569a191aSMarek Vasut 84cf0a8dabSMarek Vasutconfig TARGET_SOCFPGA_SR1500 85cf0a8dabSMarek Vasut bool "SR1500 (Cyclone V)" 86cf0a8dabSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 87cf0a8dabSMarek Vasut 8855c7a765SDinh Nguyenconfig TARGET_SOCFPGA_TERASIC_DE0_NANO 8955c7a765SDinh Nguyen bool "Terasic DE0-Nano-Atlas (Cyclone V)" 9055c7a765SDinh Nguyen select TARGET_SOCFPGA_CYCLONE5 9155c7a765SDinh Nguyen 926bd041f0SDalon Westergreenconfig TARGET_SOCFPGA_TERASIC_DE10_NANO 936bd041f0SDalon Westergreen bool "Terasic DE10-Nano (Cyclone V)" 946bd041f0SDalon Westergreen select TARGET_SOCFPGA_CYCLONE5 956bd041f0SDalon Westergreen 96e9c847c3SAnatolij Gustschinconfig TARGET_SOCFPGA_TERASIC_DE1_SOC 97e9c847c3SAnatolij Gustschin bool "Terasic DE1-SoC (Cyclone V)" 98e9c847c3SAnatolij Gustschin select TARGET_SOCFPGA_CYCLONE5 99e9c847c3SAnatolij Gustschin 100952caa28SMarek Vasutconfig TARGET_SOCFPGA_TERASIC_SOCKIT 101952caa28SMarek Vasut bool "Terasic SoCkit (Cyclone V)" 102952caa28SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 103952caa28SMarek Vasut 1047865f4b0SMasahiro Yamadaendchoice 1057865f4b0SMasahiro Yamada 1067865f4b0SMasahiro Yamadaconfig SYS_BOARD 107f0892401SMarek Vasut default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 108*d89e979cSLey Foon Tan default "arria10-socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK 109f0892401SMarek Vasut default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 11055c7a765SDinh Nguyen default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 111e9c847c3SAnatolij Gustschin default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC 1126bd041f0SDalon Westergreen default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO 11335546f6fSPavel Machek default "is1" if TARGET_SOCFPGA_IS1 114a548bc51SMarek Vasut default "mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK 115952caa28SMarek Vasut default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 116856b30daSMarek Vasut default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES 117ae9996c8SStefan Roese default "sr1500" if TARGET_SOCFPGA_SR1500 118569a191aSMarek Vasut default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 1197865f4b0SMasahiro Yamada 1207865f4b0SMasahiro Yamadaconfig SYS_VENDOR 121cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK 122*d89e979cSLey Foon Tan default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK 123cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK 124a548bc51SMarek Vasut default "aries" if TARGET_SOCFPGA_ARIES_MCVEVK 125856b30daSMarek Vasut default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES 126569a191aSMarek Vasut default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 12755c7a765SDinh Nguyen default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO 128e9c847c3SAnatolij Gustschin default "terasic" if TARGET_SOCFPGA_TERASIC_DE1_SOC 1296bd041f0SDalon Westergreen default "terasic" if TARGET_SOCFPGA_TERASIC_DE10_NANO 130952caa28SMarek Vasut default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT 1317865f4b0SMasahiro Yamada 1327865f4b0SMasahiro Yamadaconfig SYS_SOC 1337865f4b0SMasahiro Yamada default "socfpga" 1347865f4b0SMasahiro Yamada 1357865f4b0SMasahiro Yamadaconfig SYS_CONFIG_NAME 1363cbc7b87SDinh Nguyen default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 137*d89e979cSLey Foon Tan default "socfpga_arria10_socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK 1383cbc7b87SDinh Nguyen default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 13955c7a765SDinh Nguyen default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 140e9c847c3SAnatolij Gustschin default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC 1416bd041f0SDalon Westergreen default "socfpga_de10_nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO 14235546f6fSPavel Machek default "socfpga_is1" if TARGET_SOCFPGA_IS1 143a548bc51SMarek Vasut default "socfpga_mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK 144952caa28SMarek Vasut default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 145856b30daSMarek Vasut default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES 146ae9996c8SStefan Roese default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500 147569a191aSMarek Vasut default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 1487865f4b0SMasahiro Yamada 1497865f4b0SMasahiro Yamadaendif 150