17865f4b0SMasahiro Yamadaif ARCH_SOCFPGA 27865f4b0SMasahiro Yamada 377d2f7f5SSimon Glassconfig SPL_LIBCOMMON_SUPPORT 477d2f7f5SSimon Glass default y 577d2f7f5SSimon Glass 61646eba8SSimon Glassconfig SPL_LIBDISK_SUPPORT 71646eba8SSimon Glass default y 81646eba8SSimon Glass 9cc4288efSSimon Glassconfig SPL_LIBGENERIC_SUPPORT 10cc4288efSSimon Glass default y 11cc4288efSSimon Glass 121fdf7c64SSimon Glassconfig SPL_MMC_SUPPORT 131fdf7c64SSimon Glass default y if DM_MMC 141fdf7c64SSimon Glass 15*d6b9bd89SSimon Glassconfig SPL_NAND_SUPPORT 16*d6b9bd89SSimon Glass default y if SPL_NAND_DENALI 17*d6b9bd89SSimon Glass 18cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5 19cd9b7317SMarek Vasut bool 20ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 21cd9b7317SMarek Vasut 22cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5 23cd9b7317SMarek Vasut bool 24ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 25ed77aeb5SDinh Nguyen 26ed77aeb5SDinh Nguyenconfig TARGET_SOCFPGA_GEN5 27ed77aeb5SDinh Nguyen bool 28cd9b7317SMarek Vasut 297865f4b0SMasahiro Yamadachoice 307865f4b0SMasahiro Yamada prompt "Altera SOCFPGA board select" 31a26cd049SJoe Hershberger optional 327865f4b0SMasahiro Yamada 33cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5_SOCDK 34cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Arria V)" 35cd9b7317SMarek Vasut select TARGET_SOCFPGA_ARRIA5 367865f4b0SMasahiro Yamada 37cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5_SOCDK 38cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Cyclone V)" 39cd9b7317SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 407865f4b0SMasahiro Yamada 41d88995a8SMarek Vasutconfig TARGET_SOCFPGA_DENX_MCVEVK 42d88995a8SMarek Vasut bool "DENX MCVEVK (Cyclone V)" 43d88995a8SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 44d88995a8SMarek Vasut 45856b30daSMarek Vasutconfig TARGET_SOCFPGA_EBV_SOCRATES 46856b30daSMarek Vasut bool "EBV SoCrates (Cyclone V)" 47856b30daSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 48856b30daSMarek Vasut 4935546f6fSPavel Machekconfig TARGET_SOCFPGA_IS1 5035546f6fSPavel Machek bool "IS1 (Cyclone V)" 5135546f6fSPavel Machek select TARGET_SOCFPGA_CYCLONE5 5235546f6fSPavel Machek 53569a191aSMarek Vasutconfig TARGET_SOCFPGA_SAMTEC_VINING_FPGA 54569a191aSMarek Vasut bool "samtec VIN|ING FPGA (Cyclone V)" 55569a191aSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 56569a191aSMarek Vasut 57cf0a8dabSMarek Vasutconfig TARGET_SOCFPGA_SR1500 58cf0a8dabSMarek Vasut bool "SR1500 (Cyclone V)" 59cf0a8dabSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 60cf0a8dabSMarek Vasut 6155c7a765SDinh Nguyenconfig TARGET_SOCFPGA_TERASIC_DE0_NANO 6255c7a765SDinh Nguyen bool "Terasic DE0-Nano-Atlas (Cyclone V)" 6355c7a765SDinh Nguyen select TARGET_SOCFPGA_CYCLONE5 6455c7a765SDinh Nguyen 65952caa28SMarek Vasutconfig TARGET_SOCFPGA_TERASIC_SOCKIT 66952caa28SMarek Vasut bool "Terasic SoCkit (Cyclone V)" 67952caa28SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 68952caa28SMarek Vasut 697865f4b0SMasahiro Yamadaendchoice 707865f4b0SMasahiro Yamada 717865f4b0SMasahiro Yamadaconfig SYS_BOARD 72f0892401SMarek Vasut default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 73f0892401SMarek Vasut default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 7455c7a765SDinh Nguyen default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 7535546f6fSPavel Machek default "is1" if TARGET_SOCFPGA_IS1 76d88995a8SMarek Vasut default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK 77952caa28SMarek Vasut default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 78856b30daSMarek Vasut default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES 79ae9996c8SStefan Roese default "sr1500" if TARGET_SOCFPGA_SR1500 80569a191aSMarek Vasut default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 817865f4b0SMasahiro Yamada 827865f4b0SMasahiro Yamadaconfig SYS_VENDOR 83cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK 84cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK 85d88995a8SMarek Vasut default "denx" if TARGET_SOCFPGA_DENX_MCVEVK 86856b30daSMarek Vasut default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES 87569a191aSMarek Vasut default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 8855c7a765SDinh Nguyen default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO 89952caa28SMarek Vasut default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT 907865f4b0SMasahiro Yamada 917865f4b0SMasahiro Yamadaconfig SYS_SOC 927865f4b0SMasahiro Yamada default "socfpga" 937865f4b0SMasahiro Yamada 947865f4b0SMasahiro Yamadaconfig SYS_CONFIG_NAME 953cbc7b87SDinh Nguyen default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 963cbc7b87SDinh Nguyen default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 9755c7a765SDinh Nguyen default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 9835546f6fSPavel Machek default "socfpga_is1" if TARGET_SOCFPGA_IS1 99d88995a8SMarek Vasut default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK 100952caa28SMarek Vasut default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 101856b30daSMarek Vasut default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES 102ae9996c8SStefan Roese default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500 103569a191aSMarek Vasut default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 1047865f4b0SMasahiro Yamada 1057865f4b0SMasahiro Yamadaendif 106