17865f4b0SMasahiro Yamadaif ARCH_SOCFPGA 27865f4b0SMasahiro Yamada 3f0fb4fa7SDalon Westergreenconfig SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE 4f0fb4fa7SDalon Westergreen default 0xa2 5f0fb4fa7SDalon Westergreen 6cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5 7cd9b7317SMarek Vasut bool 8ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 9cd9b7317SMarek Vasut 10d89e979cSLey Foon Tanconfig TARGET_SOCFPGA_ARRIA10 11d89e979cSLey Foon Tan bool 120680f1b1SLey Foon Tan select SPL_BOARD_INIT if SPL 13*901af3e9STien Fong Chee select ALTERA_SDRAM 14d89e979cSLey Foon Tan 15cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5 16cd9b7317SMarek Vasut bool 17ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 18ed77aeb5SDinh Nguyen 19ed77aeb5SDinh Nguyenconfig TARGET_SOCFPGA_GEN5 20ed77aeb5SDinh Nguyen bool 21707cd012SLey Foon Tan select ALTERA_SDRAM 22cd9b7317SMarek Vasut 237865f4b0SMasahiro Yamadachoice 247865f4b0SMasahiro Yamada prompt "Altera SOCFPGA board select" 25a26cd049SJoe Hershberger optional 267865f4b0SMasahiro Yamada 27d89e979cSLey Foon Tanconfig TARGET_SOCFPGA_ARRIA10_SOCDK 28d89e979cSLey Foon Tan bool "Altera SOCFPGA SoCDK (Arria 10)" 29d89e979cSLey Foon Tan select TARGET_SOCFPGA_ARRIA10 30d89e979cSLey Foon Tan 31cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5_SOCDK 32cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Arria V)" 33cd9b7317SMarek Vasut select TARGET_SOCFPGA_ARRIA5 347865f4b0SMasahiro Yamada 35cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5_SOCDK 36cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Cyclone V)" 37cd9b7317SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 387865f4b0SMasahiro Yamada 39a548bc51SMarek Vasutconfig TARGET_SOCFPGA_ARIES_MCVEVK 40a548bc51SMarek Vasut bool "Aries MCVEVK (Cyclone V)" 41d88995a8SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 42d88995a8SMarek Vasut 437fb46430SMarek Vasutconfig TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1 447fb46430SMarek Vasut bool "Devboards DBM-SoC1 (Cyclone V)" 457fb46430SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 467fb46430SMarek Vasut 47856b30daSMarek Vasutconfig TARGET_SOCFPGA_EBV_SOCRATES 48856b30daSMarek Vasut bool "EBV SoCrates (Cyclone V)" 49856b30daSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 50856b30daSMarek Vasut 5135546f6fSPavel Machekconfig TARGET_SOCFPGA_IS1 5235546f6fSPavel Machek bool "IS1 (Cyclone V)" 5335546f6fSPavel Machek select TARGET_SOCFPGA_CYCLONE5 5435546f6fSPavel Machek 55569a191aSMarek Vasutconfig TARGET_SOCFPGA_SAMTEC_VINING_FPGA 56569a191aSMarek Vasut bool "samtec VIN|ING FPGA (Cyclone V)" 57e5ec4815STom Rini select BOARD_LATE_INIT 58569a191aSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 59569a191aSMarek Vasut 60cf0a8dabSMarek Vasutconfig TARGET_SOCFPGA_SR1500 61cf0a8dabSMarek Vasut bool "SR1500 (Cyclone V)" 62cf0a8dabSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 63cf0a8dabSMarek Vasut 6455c7a765SDinh Nguyenconfig TARGET_SOCFPGA_TERASIC_DE0_NANO 6555c7a765SDinh Nguyen bool "Terasic DE0-Nano-Atlas (Cyclone V)" 6655c7a765SDinh Nguyen select TARGET_SOCFPGA_CYCLONE5 6755c7a765SDinh Nguyen 686bd041f0SDalon Westergreenconfig TARGET_SOCFPGA_TERASIC_DE10_NANO 696bd041f0SDalon Westergreen bool "Terasic DE10-Nano (Cyclone V)" 706bd041f0SDalon Westergreen select TARGET_SOCFPGA_CYCLONE5 716bd041f0SDalon Westergreen 72e9c847c3SAnatolij Gustschinconfig TARGET_SOCFPGA_TERASIC_DE1_SOC 73e9c847c3SAnatolij Gustschin bool "Terasic DE1-SoC (Cyclone V)" 74e9c847c3SAnatolij Gustschin select TARGET_SOCFPGA_CYCLONE5 75e9c847c3SAnatolij Gustschin 76952caa28SMarek Vasutconfig TARGET_SOCFPGA_TERASIC_SOCKIT 77952caa28SMarek Vasut bool "Terasic SoCkit (Cyclone V)" 78952caa28SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 79952caa28SMarek Vasut 807865f4b0SMasahiro Yamadaendchoice 817865f4b0SMasahiro Yamada 827865f4b0SMasahiro Yamadaconfig SYS_BOARD 83f0892401SMarek Vasut default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 84d89e979cSLey Foon Tan default "arria10-socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK 85f0892401SMarek Vasut default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 867fb46430SMarek Vasut default "dbm-soc1" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1 8755c7a765SDinh Nguyen default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 88e9c847c3SAnatolij Gustschin default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC 896bd041f0SDalon Westergreen default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO 9035546f6fSPavel Machek default "is1" if TARGET_SOCFPGA_IS1 91a548bc51SMarek Vasut default "mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK 92952caa28SMarek Vasut default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 93856b30daSMarek Vasut default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES 94ae9996c8SStefan Roese default "sr1500" if TARGET_SOCFPGA_SR1500 95569a191aSMarek Vasut default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 967865f4b0SMasahiro Yamada 977865f4b0SMasahiro Yamadaconfig SYS_VENDOR 98cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK 99d89e979cSLey Foon Tan default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK 100cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK 101a548bc51SMarek Vasut default "aries" if TARGET_SOCFPGA_ARIES_MCVEVK 1027fb46430SMarek Vasut default "devboards" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1 103856b30daSMarek Vasut default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES 104569a191aSMarek Vasut default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 10555c7a765SDinh Nguyen default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO 106e9c847c3SAnatolij Gustschin default "terasic" if TARGET_SOCFPGA_TERASIC_DE1_SOC 1076bd041f0SDalon Westergreen default "terasic" if TARGET_SOCFPGA_TERASIC_DE10_NANO 108952caa28SMarek Vasut default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT 1097865f4b0SMasahiro Yamada 1107865f4b0SMasahiro Yamadaconfig SYS_SOC 1117865f4b0SMasahiro Yamada default "socfpga" 1127865f4b0SMasahiro Yamada 1137865f4b0SMasahiro Yamadaconfig SYS_CONFIG_NAME 1143cbc7b87SDinh Nguyen default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 115d89e979cSLey Foon Tan default "socfpga_arria10_socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK 1163cbc7b87SDinh Nguyen default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 1177fb46430SMarek Vasut default "socfpga_dbm_soc1" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1 11855c7a765SDinh Nguyen default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 119e9c847c3SAnatolij Gustschin default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC 1206bd041f0SDalon Westergreen default "socfpga_de10_nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO 12135546f6fSPavel Machek default "socfpga_is1" if TARGET_SOCFPGA_IS1 122a548bc51SMarek Vasut default "socfpga_mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK 123952caa28SMarek Vasut default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 124856b30daSMarek Vasut default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES 125ae9996c8SStefan Roese default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500 126569a191aSMarek Vasut default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 1277865f4b0SMasahiro Yamada 1287865f4b0SMasahiro Yamadaendif 129