17865f4b0SMasahiro Yamadaif ARCH_SOCFPGA 27865f4b0SMasahiro Yamada 377d2f7f5SSimon Glassconfig SPL_LIBCOMMON_SUPPORT 477d2f7f5SSimon Glass default y 577d2f7f5SSimon Glass 61646eba8SSimon Glassconfig SPL_LIBDISK_SUPPORT 71646eba8SSimon Glass default y 81646eba8SSimon Glass 9cc4288efSSimon Glassconfig SPL_LIBGENERIC_SUPPORT 10cc4288efSSimon Glass default y 11cc4288efSSimon Glass 121fdf7c64SSimon Glassconfig SPL_MMC_SUPPORT 131fdf7c64SSimon Glass default y if DM_MMC 141fdf7c64SSimon Glass 15d6b9bd89SSimon Glassconfig SPL_NAND_SUPPORT 16d6b9bd89SSimon Glass default y if SPL_NAND_DENALI 17d6b9bd89SSimon Glass 18e00f76ceSSimon Glassconfig SPL_SERIAL_SUPPORT 19e00f76ceSSimon Glass default y 20e00f76ceSSimon Glass 21e404ade4SSimon Glassconfig SPL_SPI_FLASH_SUPPORT 22f35ed9edSSimon Glass default y if SPL_SPI_SUPPORT 23f35ed9edSSimon Glass 24f35ed9edSSimon Glassconfig SPL_SPI_SUPPORT 25e404ade4SSimon Glass default y if DM_SPI 26e404ade4SSimon Glass 2702e69a5dSSimon Glassconfig SPL_WATCHDOG_SUPPORT 2802e69a5dSSimon Glass default y 2902e69a5dSSimon Glass 30f0fb4fa7SDalon Westergreenconfig SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE 31f0fb4fa7SDalon Westergreen default y 32f0fb4fa7SDalon Westergreen 33f0fb4fa7SDalon Westergreenconfig SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE 34f0fb4fa7SDalon Westergreen default 0xa2 35f0fb4fa7SDalon Westergreen 36cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5 37cd9b7317SMarek Vasut bool 38ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 39cd9b7317SMarek Vasut 40cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5 41cd9b7317SMarek Vasut bool 42ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 43ed77aeb5SDinh Nguyen 44ed77aeb5SDinh Nguyenconfig TARGET_SOCFPGA_GEN5 45ed77aeb5SDinh Nguyen bool 46*707cd012SLey Foon Tan select ALTERA_SDRAM 47cd9b7317SMarek Vasut 487865f4b0SMasahiro Yamadachoice 497865f4b0SMasahiro Yamada prompt "Altera SOCFPGA board select" 50a26cd049SJoe Hershberger optional 517865f4b0SMasahiro Yamada 52cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5_SOCDK 53cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Arria V)" 54cd9b7317SMarek Vasut select TARGET_SOCFPGA_ARRIA5 557865f4b0SMasahiro Yamada 56cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5_SOCDK 57cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Cyclone V)" 58cd9b7317SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 597865f4b0SMasahiro Yamada 60a548bc51SMarek Vasutconfig TARGET_SOCFPGA_ARIES_MCVEVK 61a548bc51SMarek Vasut bool "Aries MCVEVK (Cyclone V)" 62d88995a8SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 63d88995a8SMarek Vasut 64856b30daSMarek Vasutconfig TARGET_SOCFPGA_EBV_SOCRATES 65856b30daSMarek Vasut bool "EBV SoCrates (Cyclone V)" 66856b30daSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 67856b30daSMarek Vasut 6835546f6fSPavel Machekconfig TARGET_SOCFPGA_IS1 6935546f6fSPavel Machek bool "IS1 (Cyclone V)" 7035546f6fSPavel Machek select TARGET_SOCFPGA_CYCLONE5 7135546f6fSPavel Machek 72569a191aSMarek Vasutconfig TARGET_SOCFPGA_SAMTEC_VINING_FPGA 73569a191aSMarek Vasut bool "samtec VIN|ING FPGA (Cyclone V)" 74e5ec4815STom Rini select BOARD_LATE_INIT 75569a191aSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 76569a191aSMarek Vasut 77cf0a8dabSMarek Vasutconfig TARGET_SOCFPGA_SR1500 78cf0a8dabSMarek Vasut bool "SR1500 (Cyclone V)" 79cf0a8dabSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 80cf0a8dabSMarek Vasut 8155c7a765SDinh Nguyenconfig TARGET_SOCFPGA_TERASIC_DE0_NANO 8255c7a765SDinh Nguyen bool "Terasic DE0-Nano-Atlas (Cyclone V)" 8355c7a765SDinh Nguyen select TARGET_SOCFPGA_CYCLONE5 8455c7a765SDinh Nguyen 85e9c847c3SAnatolij Gustschinconfig TARGET_SOCFPGA_TERASIC_DE1_SOC 86e9c847c3SAnatolij Gustschin bool "Terasic DE1-SoC (Cyclone V)" 87e9c847c3SAnatolij Gustschin select TARGET_SOCFPGA_CYCLONE5 88e9c847c3SAnatolij Gustschin 89952caa28SMarek Vasutconfig TARGET_SOCFPGA_TERASIC_SOCKIT 90952caa28SMarek Vasut bool "Terasic SoCkit (Cyclone V)" 91952caa28SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 92952caa28SMarek Vasut 937865f4b0SMasahiro Yamadaendchoice 947865f4b0SMasahiro Yamada 957865f4b0SMasahiro Yamadaconfig SYS_BOARD 96f0892401SMarek Vasut default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 97f0892401SMarek Vasut default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 9855c7a765SDinh Nguyen default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 99e9c847c3SAnatolij Gustschin default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC 10035546f6fSPavel Machek default "is1" if TARGET_SOCFPGA_IS1 101a548bc51SMarek Vasut default "mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK 102952caa28SMarek Vasut default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 103856b30daSMarek Vasut default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES 104ae9996c8SStefan Roese default "sr1500" if TARGET_SOCFPGA_SR1500 105569a191aSMarek Vasut default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 1067865f4b0SMasahiro Yamada 1077865f4b0SMasahiro Yamadaconfig SYS_VENDOR 108cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK 109cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK 110a548bc51SMarek Vasut default "aries" if TARGET_SOCFPGA_ARIES_MCVEVK 111856b30daSMarek Vasut default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES 112569a191aSMarek Vasut default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 11355c7a765SDinh Nguyen default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO 114e9c847c3SAnatolij Gustschin default "terasic" if TARGET_SOCFPGA_TERASIC_DE1_SOC 115952caa28SMarek Vasut default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT 1167865f4b0SMasahiro Yamada 1177865f4b0SMasahiro Yamadaconfig SYS_SOC 1187865f4b0SMasahiro Yamada default "socfpga" 1197865f4b0SMasahiro Yamada 1207865f4b0SMasahiro Yamadaconfig SYS_CONFIG_NAME 1213cbc7b87SDinh Nguyen default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 1223cbc7b87SDinh Nguyen default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 12355c7a765SDinh Nguyen default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 124e9c847c3SAnatolij Gustschin default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC 12535546f6fSPavel Machek default "socfpga_is1" if TARGET_SOCFPGA_IS1 126a548bc51SMarek Vasut default "socfpga_mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK 127952caa28SMarek Vasut default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 128856b30daSMarek Vasut default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES 129ae9996c8SStefan Roese default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500 130569a191aSMarek Vasut default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 1317865f4b0SMasahiro Yamada 1327865f4b0SMasahiro Yamadaendif 133