17865f4b0SMasahiro Yamadaif ARCH_SOCFPGA 27865f4b0SMasahiro Yamada 3cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5 4cd9b7317SMarek Vasut bool 5ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 6cd9b7317SMarek Vasut 7cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5 8cd9b7317SMarek Vasut bool 9ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 10ed77aeb5SDinh Nguyen 11ed77aeb5SDinh Nguyenconfig TARGET_SOCFPGA_GEN5 12ed77aeb5SDinh Nguyen bool 13cd9b7317SMarek Vasut 147865f4b0SMasahiro Yamadachoice 157865f4b0SMasahiro Yamada prompt "Altera SOCFPGA board select" 16a26cd049SJoe Hershberger optional 177865f4b0SMasahiro Yamada 18cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5_SOCDK 19cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Arria V)" 20cd9b7317SMarek Vasut select TARGET_SOCFPGA_ARRIA5 217865f4b0SMasahiro Yamada 22cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5_SOCDK 23cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Cyclone V)" 24cd9b7317SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 257865f4b0SMasahiro Yamada 26d88995a8SMarek Vasutconfig TARGET_SOCFPGA_DENX_MCVEVK 27d88995a8SMarek Vasut bool "DENX MCVEVK (Cyclone V)" 28d88995a8SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 29d88995a8SMarek Vasut 30ae9996c8SStefan Roeseconfig TARGET_SOCFPGA_SR1500 31ae9996c8SStefan Roese bool "SR1500 (Cyclone V)" 32ae9996c8SStefan Roese select TARGET_SOCFPGA_CYCLONE5 33ae9996c8SStefan Roese 34856b30daSMarek Vasutconfig TARGET_SOCFPGA_EBV_SOCRATES 35856b30daSMarek Vasut bool "EBV SoCrates (Cyclone V)" 36856b30daSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 37856b30daSMarek Vasut 38*569a191aSMarek Vasutconfig TARGET_SOCFPGA_SAMTEC_VINING_FPGA 39*569a191aSMarek Vasut bool "samtec VIN|ING FPGA (Cyclone V)" 40*569a191aSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 41*569a191aSMarek Vasut 4255c7a765SDinh Nguyenconfig TARGET_SOCFPGA_TERASIC_DE0_NANO 4355c7a765SDinh Nguyen bool "Terasic DE0-Nano-Atlas (Cyclone V)" 4455c7a765SDinh Nguyen select TARGET_SOCFPGA_CYCLONE5 4555c7a765SDinh Nguyen 46952caa28SMarek Vasutconfig TARGET_SOCFPGA_TERASIC_SOCKIT 47952caa28SMarek Vasut bool "Terasic SoCkit (Cyclone V)" 48952caa28SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 49952caa28SMarek Vasut 507865f4b0SMasahiro Yamadaendchoice 517865f4b0SMasahiro Yamada 527865f4b0SMasahiro Yamadaconfig SYS_BOARD 53f0892401SMarek Vasut default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 54f0892401SMarek Vasut default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 5555c7a765SDinh Nguyen default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 56d88995a8SMarek Vasut default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK 57952caa28SMarek Vasut default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 58856b30daSMarek Vasut default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES 59ae9996c8SStefan Roese default "sr1500" if TARGET_SOCFPGA_SR1500 60*569a191aSMarek Vasut default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 617865f4b0SMasahiro Yamada 627865f4b0SMasahiro Yamadaconfig SYS_VENDOR 63cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK 64cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK 65d88995a8SMarek Vasut default "denx" if TARGET_SOCFPGA_DENX_MCVEVK 66856b30daSMarek Vasut default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES 67*569a191aSMarek Vasut default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 6855c7a765SDinh Nguyen default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO 69952caa28SMarek Vasut default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT 707865f4b0SMasahiro Yamada 717865f4b0SMasahiro Yamadaconfig SYS_SOC 727865f4b0SMasahiro Yamada default "socfpga" 737865f4b0SMasahiro Yamada 747865f4b0SMasahiro Yamadaconfig SYS_CONFIG_NAME 753cbc7b87SDinh Nguyen default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 763cbc7b87SDinh Nguyen default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 7755c7a765SDinh Nguyen default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 78d88995a8SMarek Vasut default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK 79952caa28SMarek Vasut default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 80856b30daSMarek Vasut default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES 81ae9996c8SStefan Roese default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500 82*569a191aSMarek Vasut default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 837865f4b0SMasahiro Yamada 847865f4b0SMasahiro Yamadaendif 85