17865f4b0SMasahiro Yamadaif ARCH_SOCFPGA 27865f4b0SMasahiro Yamada 3cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5 4cd9b7317SMarek Vasut bool 5cd9b7317SMarek Vasut 6cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5 7cd9b7317SMarek Vasut bool 8cd9b7317SMarek Vasut 97865f4b0SMasahiro Yamadachoice 107865f4b0SMasahiro Yamada prompt "Altera SOCFPGA board select" 11a26cd049SJoe Hershberger optional 127865f4b0SMasahiro Yamada 13cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5_SOCDK 14cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Arria V)" 15cd9b7317SMarek Vasut select TARGET_SOCFPGA_ARRIA5 167865f4b0SMasahiro Yamada 17cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5_SOCDK 18cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Cyclone V)" 19cd9b7317SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 207865f4b0SMasahiro Yamada 21d88995a8SMarek Vasutconfig TARGET_SOCFPGA_DENX_MCVEVK 22d88995a8SMarek Vasut bool "DENX MCVEVK (Cyclone V)" 23d88995a8SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 24d88995a8SMarek Vasut 2555c7a765SDinh Nguyenconfig TARGET_SOCFPGA_TERASIC_DE0_NANO 2655c7a765SDinh Nguyen bool "Terasic DE0-Nano-Atlas (Cyclone V)" 2755c7a765SDinh Nguyen select TARGET_SOCFPGA_CYCLONE5 2855c7a765SDinh Nguyen 29952caa28SMarek Vasutconfig TARGET_SOCFPGA_TERASIC_SOCKIT 30952caa28SMarek Vasut bool "Terasic SoCkit (Cyclone V)" 31952caa28SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 32952caa28SMarek Vasut 337865f4b0SMasahiro Yamadaendchoice 347865f4b0SMasahiro Yamada 357865f4b0SMasahiro Yamadaconfig SYS_BOARD 36f0892401SMarek Vasut default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 37f0892401SMarek Vasut default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 3855c7a765SDinh Nguyen default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 39d88995a8SMarek Vasut default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK 40952caa28SMarek Vasut default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 417865f4b0SMasahiro Yamada 427865f4b0SMasahiro Yamadaconfig SYS_VENDOR 43cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK 44cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK 45d88995a8SMarek Vasut default "denx" if TARGET_SOCFPGA_DENX_MCVEVK 4655c7a765SDinh Nguyen default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO 47952caa28SMarek Vasut default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT 487865f4b0SMasahiro Yamada 497865f4b0SMasahiro Yamadaconfig SYS_SOC 507865f4b0SMasahiro Yamada default "socfpga" 517865f4b0SMasahiro Yamada 527865f4b0SMasahiro Yamadaconfig SYS_CONFIG_NAME 53*3cbc7b87SDinh Nguyen default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 54*3cbc7b87SDinh Nguyen default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 5555c7a765SDinh Nguyen default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 56d88995a8SMarek Vasut default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK 57952caa28SMarek Vasut default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 587865f4b0SMasahiro Yamada 597865f4b0SMasahiro Yamadaendif 60