17865f4b0SMasahiro Yamadaif ARCH_SOCFPGA 27865f4b0SMasahiro Yamada 3cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5 4cd9b7317SMarek Vasut bool 5ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 6cd9b7317SMarek Vasut 7cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5 8cd9b7317SMarek Vasut bool 9ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 10ed77aeb5SDinh Nguyen 11ed77aeb5SDinh Nguyenconfig TARGET_SOCFPGA_GEN5 12ed77aeb5SDinh Nguyen bool 13cd9b7317SMarek Vasut 147865f4b0SMasahiro Yamadachoice 157865f4b0SMasahiro Yamada prompt "Altera SOCFPGA board select" 16a26cd049SJoe Hershberger optional 177865f4b0SMasahiro Yamada 18cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5_SOCDK 19cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Arria V)" 20cd9b7317SMarek Vasut select TARGET_SOCFPGA_ARRIA5 217865f4b0SMasahiro Yamada 22cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5_SOCDK 23cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Cyclone V)" 24cd9b7317SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 257865f4b0SMasahiro Yamada 26d88995a8SMarek Vasutconfig TARGET_SOCFPGA_DENX_MCVEVK 27d88995a8SMarek Vasut bool "DENX MCVEVK (Cyclone V)" 28d88995a8SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 29d88995a8SMarek Vasut 30ae9996c8SStefan Roeseconfig TARGET_SOCFPGA_SR1500 31ae9996c8SStefan Roese bool "SR1500 (Cyclone V)" 32ae9996c8SStefan Roese select TARGET_SOCFPGA_CYCLONE5 33ae9996c8SStefan Roese 34856b30daSMarek Vasutconfig TARGET_SOCFPGA_EBV_SOCRATES 35856b30daSMarek Vasut bool "EBV SoCrates (Cyclone V)" 36856b30daSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 37856b30daSMarek Vasut 38*35546f6fSPavel Machekconfig TARGET_SOCFPGA_IS1 39*35546f6fSPavel Machek bool "IS1 (Cyclone V)" 40*35546f6fSPavel Machek select TARGET_SOCFPGA_CYCLONE5 41*35546f6fSPavel Machek 42569a191aSMarek Vasutconfig TARGET_SOCFPGA_SAMTEC_VINING_FPGA 43569a191aSMarek Vasut bool "samtec VIN|ING FPGA (Cyclone V)" 44569a191aSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 45569a191aSMarek Vasut 4655c7a765SDinh Nguyenconfig TARGET_SOCFPGA_TERASIC_DE0_NANO 4755c7a765SDinh Nguyen bool "Terasic DE0-Nano-Atlas (Cyclone V)" 4855c7a765SDinh Nguyen select TARGET_SOCFPGA_CYCLONE5 4955c7a765SDinh Nguyen 50952caa28SMarek Vasutconfig TARGET_SOCFPGA_TERASIC_SOCKIT 51952caa28SMarek Vasut bool "Terasic SoCkit (Cyclone V)" 52952caa28SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 53952caa28SMarek Vasut 547865f4b0SMasahiro Yamadaendchoice 557865f4b0SMasahiro Yamada 567865f4b0SMasahiro Yamadaconfig SYS_BOARD 57f0892401SMarek Vasut default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 58f0892401SMarek Vasut default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 5955c7a765SDinh Nguyen default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 60*35546f6fSPavel Machek default "is1" if TARGET_SOCFPGA_IS1 61d88995a8SMarek Vasut default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK 62952caa28SMarek Vasut default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 63856b30daSMarek Vasut default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES 64ae9996c8SStefan Roese default "sr1500" if TARGET_SOCFPGA_SR1500 65569a191aSMarek Vasut default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 667865f4b0SMasahiro Yamada 677865f4b0SMasahiro Yamadaconfig SYS_VENDOR 68cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK 69cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK 70d88995a8SMarek Vasut default "denx" if TARGET_SOCFPGA_DENX_MCVEVK 71856b30daSMarek Vasut default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES 72569a191aSMarek Vasut default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 7355c7a765SDinh Nguyen default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO 74952caa28SMarek Vasut default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT 757865f4b0SMasahiro Yamada 767865f4b0SMasahiro Yamadaconfig SYS_SOC 777865f4b0SMasahiro Yamada default "socfpga" 787865f4b0SMasahiro Yamada 797865f4b0SMasahiro Yamadaconfig SYS_CONFIG_NAME 803cbc7b87SDinh Nguyen default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 813cbc7b87SDinh Nguyen default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 8255c7a765SDinh Nguyen default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 83*35546f6fSPavel Machek default "socfpga_is1" if TARGET_SOCFPGA_IS1 84d88995a8SMarek Vasut default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK 85952caa28SMarek Vasut default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 86856b30daSMarek Vasut default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES 87ae9996c8SStefan Roese default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500 88569a191aSMarek Vasut default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 897865f4b0SMasahiro Yamada 907865f4b0SMasahiro Yamadaendif 91