17865f4b0SMasahiro Yamadaif ARCH_SOCFPGA 27865f4b0SMasahiro Yamada 377d2f7f5SSimon Glassconfig SPL_LIBCOMMON_SUPPORT 477d2f7f5SSimon Glass default y 577d2f7f5SSimon Glass 61646eba8SSimon Glassconfig SPL_LIBDISK_SUPPORT 71646eba8SSimon Glass default y 81646eba8SSimon Glass 9cc4288efSSimon Glassconfig SPL_LIBGENERIC_SUPPORT 10cc4288efSSimon Glass default y 11cc4288efSSimon Glass 121fdf7c64SSimon Glassconfig SPL_MMC_SUPPORT 131fdf7c64SSimon Glass default y if DM_MMC 141fdf7c64SSimon Glass 15d6b9bd89SSimon Glassconfig SPL_NAND_SUPPORT 16d6b9bd89SSimon Glass default y if SPL_NAND_DENALI 17d6b9bd89SSimon Glass 18e00f76ceSSimon Glassconfig SPL_SERIAL_SUPPORT 19e00f76ceSSimon Glass default y 20e00f76ceSSimon Glass 21e404ade4SSimon Glassconfig SPL_SPI_FLASH_SUPPORT 22f35ed9edSSimon Glass default y if SPL_SPI_SUPPORT 23f35ed9edSSimon Glass 24f35ed9edSSimon Glassconfig SPL_SPI_SUPPORT 25e404ade4SSimon Glass default y if DM_SPI 26e404ade4SSimon Glass 27*02e69a5dSSimon Glassconfig SPL_WATCHDOG_SUPPORT 28*02e69a5dSSimon Glass default y 29*02e69a5dSSimon Glass 30cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5 31cd9b7317SMarek Vasut bool 32ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 33cd9b7317SMarek Vasut 34cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5 35cd9b7317SMarek Vasut bool 36ed77aeb5SDinh Nguyen select TARGET_SOCFPGA_GEN5 37ed77aeb5SDinh Nguyen 38ed77aeb5SDinh Nguyenconfig TARGET_SOCFPGA_GEN5 39ed77aeb5SDinh Nguyen bool 40cd9b7317SMarek Vasut 417865f4b0SMasahiro Yamadachoice 427865f4b0SMasahiro Yamada prompt "Altera SOCFPGA board select" 43a26cd049SJoe Hershberger optional 447865f4b0SMasahiro Yamada 45cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_ARRIA5_SOCDK 46cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Arria V)" 47cd9b7317SMarek Vasut select TARGET_SOCFPGA_ARRIA5 487865f4b0SMasahiro Yamada 49cd9b7317SMarek Vasutconfig TARGET_SOCFPGA_CYCLONE5_SOCDK 50cd9b7317SMarek Vasut bool "Altera SOCFPGA SoCDK (Cyclone V)" 51cd9b7317SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 527865f4b0SMasahiro Yamada 53d88995a8SMarek Vasutconfig TARGET_SOCFPGA_DENX_MCVEVK 54d88995a8SMarek Vasut bool "DENX MCVEVK (Cyclone V)" 55d88995a8SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 56d88995a8SMarek Vasut 57856b30daSMarek Vasutconfig TARGET_SOCFPGA_EBV_SOCRATES 58856b30daSMarek Vasut bool "EBV SoCrates (Cyclone V)" 59856b30daSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 60856b30daSMarek Vasut 6135546f6fSPavel Machekconfig TARGET_SOCFPGA_IS1 6235546f6fSPavel Machek bool "IS1 (Cyclone V)" 6335546f6fSPavel Machek select TARGET_SOCFPGA_CYCLONE5 6435546f6fSPavel Machek 65569a191aSMarek Vasutconfig TARGET_SOCFPGA_SAMTEC_VINING_FPGA 66569a191aSMarek Vasut bool "samtec VIN|ING FPGA (Cyclone V)" 67569a191aSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 68569a191aSMarek Vasut 69cf0a8dabSMarek Vasutconfig TARGET_SOCFPGA_SR1500 70cf0a8dabSMarek Vasut bool "SR1500 (Cyclone V)" 71cf0a8dabSMarek Vasut select TARGET_SOCFPGA_CYCLONE5 72cf0a8dabSMarek Vasut 7355c7a765SDinh Nguyenconfig TARGET_SOCFPGA_TERASIC_DE0_NANO 7455c7a765SDinh Nguyen bool "Terasic DE0-Nano-Atlas (Cyclone V)" 7555c7a765SDinh Nguyen select TARGET_SOCFPGA_CYCLONE5 7655c7a765SDinh Nguyen 77952caa28SMarek Vasutconfig TARGET_SOCFPGA_TERASIC_SOCKIT 78952caa28SMarek Vasut bool "Terasic SoCkit (Cyclone V)" 79952caa28SMarek Vasut select TARGET_SOCFPGA_CYCLONE5 80952caa28SMarek Vasut 817865f4b0SMasahiro Yamadaendchoice 827865f4b0SMasahiro Yamada 837865f4b0SMasahiro Yamadaconfig SYS_BOARD 84f0892401SMarek Vasut default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 85f0892401SMarek Vasut default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 8655c7a765SDinh Nguyen default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 8735546f6fSPavel Machek default "is1" if TARGET_SOCFPGA_IS1 88d88995a8SMarek Vasut default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK 89952caa28SMarek Vasut default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 90856b30daSMarek Vasut default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES 91ae9996c8SStefan Roese default "sr1500" if TARGET_SOCFPGA_SR1500 92569a191aSMarek Vasut default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 937865f4b0SMasahiro Yamada 947865f4b0SMasahiro Yamadaconfig SYS_VENDOR 95cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK 96cd9b7317SMarek Vasut default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK 97d88995a8SMarek Vasut default "denx" if TARGET_SOCFPGA_DENX_MCVEVK 98856b30daSMarek Vasut default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES 99569a191aSMarek Vasut default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 10055c7a765SDinh Nguyen default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO 101952caa28SMarek Vasut default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT 1027865f4b0SMasahiro Yamada 1037865f4b0SMasahiro Yamadaconfig SYS_SOC 1047865f4b0SMasahiro Yamada default "socfpga" 1057865f4b0SMasahiro Yamada 1067865f4b0SMasahiro Yamadaconfig SYS_CONFIG_NAME 1073cbc7b87SDinh Nguyen default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK 1083cbc7b87SDinh Nguyen default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK 10955c7a765SDinh Nguyen default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO 11035546f6fSPavel Machek default "socfpga_is1" if TARGET_SOCFPGA_IS1 111d88995a8SMarek Vasut default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK 112952caa28SMarek Vasut default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT 113856b30daSMarek Vasut default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES 114ae9996c8SStefan Roese default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500 115569a191aSMarek Vasut default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA 1167865f4b0SMasahiro Yamada 1177865f4b0SMasahiro Yamadaendif 118