1*225f5eecSMinkyu Kang /* 2*225f5eecSMinkyu Kang * Copyright (C) 2011 Samsung Electronics 3*225f5eecSMinkyu Kang * Heungjun Kim <riverful.kim@samsung.com> 4*225f5eecSMinkyu Kang * Minkyu Kang <mk7.kang@samsung.com> 5*225f5eecSMinkyu Kang * 6*225f5eecSMinkyu Kang * SPDX-License-Identifier: GPL-2.0+ 7*225f5eecSMinkyu Kang */ 8*225f5eecSMinkyu Kang 9*225f5eecSMinkyu Kang #ifndef __ASM_ARM_ARCH_WATCHDOG_H_ 10*225f5eecSMinkyu Kang #define __ASM_ARM_ARCH_WATCHDOG_H_ 11*225f5eecSMinkyu Kang 12*225f5eecSMinkyu Kang #define WTCON_RESET_OFFSET 0 13*225f5eecSMinkyu Kang #define WTCON_INTEN_OFFSET 2 14*225f5eecSMinkyu Kang #define WTCON_CLKSEL_OFFSET 3 15*225f5eecSMinkyu Kang #define WTCON_EN_OFFSET 5 16*225f5eecSMinkyu Kang #define WTCON_PRE_OFFSET 8 17*225f5eecSMinkyu Kang 18*225f5eecSMinkyu Kang #define WTCON_CLK_16 0x0 19*225f5eecSMinkyu Kang #define WTCON_CLK_32 0x1 20*225f5eecSMinkyu Kang #define WTCON_CLK_64 0x2 21*225f5eecSMinkyu Kang #define WTCON_CLK_128 0x3 22*225f5eecSMinkyu Kang 23*225f5eecSMinkyu Kang #define WTCON_CLK(x) ((x & 0x3) << WTCON_CLKSEL_OFFSET) 24*225f5eecSMinkyu Kang #define WTCON_PRESCALER(x) ((x) << WTCON_PRE_OFFSET) 25*225f5eecSMinkyu Kang #define WTCON_EN (0x1 << WTCON_EN_OFFSET) 26*225f5eecSMinkyu Kang #define WTCON_RESET (0x1 << WTCON_RESET_OFFSET) 27*225f5eecSMinkyu Kang #define WTCON_INT (0x1 << WTCON_INTEN_OFFSET) 28*225f5eecSMinkyu Kang 29*225f5eecSMinkyu Kang #ifndef __ASSEMBLY__ 30*225f5eecSMinkyu Kang struct s5p_watchdog { 31*225f5eecSMinkyu Kang unsigned int wtcon; 32*225f5eecSMinkyu Kang unsigned int wtdat; 33*225f5eecSMinkyu Kang unsigned int wtcnt; 34*225f5eecSMinkyu Kang unsigned int wtclrint; 35*225f5eecSMinkyu Kang }; 36*225f5eecSMinkyu Kang 37*225f5eecSMinkyu Kang /* functions */ 38*225f5eecSMinkyu Kang void wdt_stop(void); 39*225f5eecSMinkyu Kang void wdt_start(unsigned int timeout); 40*225f5eecSMinkyu Kang #endif /* __ASSEMBLY__ */ 41*225f5eecSMinkyu Kang 42*225f5eecSMinkyu Kang #endif 43