1 /* 2 * (C) Copyright 2009 SAMSUNG Electronics 3 * Minkyu Kang <mk7.kang@samsung.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __ASM_ARCH_MMC_H_ 9 #define __ASM_ARCH_MMC_H_ 10 11 #define S5P_MMC_DEV_OFFSET 0x100000 12 13 #define SDHCI_CONTROL2 0x80 14 #define SDHCI_CONTROL3 0x84 15 #define SDHCI_CONTROL4 0x8C 16 17 #define SDHCI_CTRL2_ENSTAASYNCCLR (1 << 31) 18 #define SDHCI_CTRL2_ENCMDCNFMSK (1 << 30) 19 #define SDHCI_CTRL2_CDINVRXD3 (1 << 29) 20 #define SDHCI_CTRL2_SLCARDOUT (1 << 28) 21 22 #define SDHCI_CTRL2_FLTCLKSEL_MASK (0xf << 24) 23 #define SDHCI_CTRL2_FLTCLKSEL_SHIFT (24) 24 #define SDHCI_CTRL2_FLTCLKSEL(_x) ((_x) << 24) 25 26 #define SDHCI_CTRL2_LVLDAT_MASK (0xff << 16) 27 #define SDHCI_CTRL2_LVLDAT_SHIFT (16) 28 #define SDHCI_CTRL2_LVLDAT(_x) ((_x) << 16) 29 30 #define SDHCI_CTRL2_ENFBCLKTX (1 << 15) 31 #define SDHCI_CTRL2_ENFBCLKRX (1 << 14) 32 #define SDHCI_CTRL2_SDCDSEL (1 << 13) 33 #define SDHCI_CTRL2_SDSIGPC (1 << 12) 34 #define SDHCI_CTRL2_ENBUSYCHKTXSTART (1 << 11) 35 36 #define SDHCI_CTRL2_DFCNT_MASK(_x) ((_x) << 9) 37 #define SDHCI_CTRL2_DFCNT_SHIFT (9) 38 39 #define SDHCI_CTRL2_ENCLKOUTHOLD (1 << 8) 40 #define SDHCI_CTRL2_RWAITMODE (1 << 7) 41 #define SDHCI_CTRL2_DISBUFRD (1 << 6) 42 #define SDHCI_CTRL2_SELBASECLK_MASK(_x) ((_x) << 4) 43 #define SDHCI_CTRL2_SELBASECLK_SHIFT (4) 44 #define SDHCI_CTRL2_PWRSYNC (1 << 3) 45 #define SDHCI_CTRL2_ENCLKOUTMSKCON (1 << 1) 46 #define SDHCI_CTRL2_HWINITFIN (1 << 0) 47 48 #define SDHCI_CTRL3_FCSEL3 (1 << 31) 49 #define SDHCI_CTRL3_FCSEL2 (1 << 23) 50 #define SDHCI_CTRL3_FCSEL1 (1 << 15) 51 #define SDHCI_CTRL3_FCSEL0 (1 << 7) 52 53 #define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) << 16) 54 #define SDHCI_CTRL4_DRIVE_SHIFT (16) 55 56 int s5p_sdhci_init(u32 regbase, int index, int bus_width); 57 58 static inline int s5p_mmc_init(int index, int bus_width) 59 { 60 unsigned int base = samsung_get_base_mmc() + 61 (S5P_MMC_DEV_OFFSET * index); 62 63 return s5p_sdhci_init(base, index, bus_width); 64 } 65 #endif 66