1 /*
2  * Copyright (c) 2016 Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <asm/armv8/mmu.h>
9 #include <asm/io.h>
10 #include <asm/arch/hardware.h>
11 
12 #define GRF_EMMCCORE_CON11 0xff77f02c
13 
14 static struct mm_region rk3399_mem_map[] = {
15 	{
16 		.virt = 0x0UL,
17 		.phys = 0x0UL,
18 		.size = 0xf8000000UL,
19 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
20 			 PTE_BLOCK_INNER_SHARE
21 	}, {
22 		.virt = 0xf8000000UL,
23 		.phys = 0xf8000000UL,
24 		.size = 0x08000000UL,
25 		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
26 			 PTE_BLOCK_NON_SHARE |
27 			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
28 	}, {
29 		/* List terminator */
30 		0,
31 	}
32 };
33 
34 struct mm_region *mem_map = rk3399_mem_map;
35 
36 int arch_cpu_init(void)
37 {
38 	/* We do some SoC one time setting here. */
39 
40 	/* Emmc clock generator: disable the clock multipilier */
41 	rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
42 
43 	return 0;
44 }
45