1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
4  * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
5  */
6 
7 #include <common.h>
8 #include <asm/arch/bootrom.h>
9 #include <asm/arch/clock.h>
10 #include <asm/arch/grf_rk3399.h>
11 #include <asm/arch/hardware.h>
12 #include <asm/arch/periph.h>
13 #include <asm/io.h>
14 #include <debug_uart.h>
15 #include <dm.h>
16 #include <dm/pinctrl.h>
17 #include <ram.h>
18 #include <spl.h>
19 #include <syscon.h>
20 
21 void board_return_to_bootrom(void)
22 {
23 	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
24 }
25 
26 static const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
27 	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
28 	[BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000",
29 	[BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
30 };
31 
32 const char *board_spl_was_booted_from(void)
33 {
34 	u32  bootdevice_brom_id = readl(RK3399_BROM_BOOTSOURCE_ID_ADDR);
35 	const char *bootdevice_ofpath = NULL;
36 
37 	if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
38 		bootdevice_ofpath = boot_devices[bootdevice_brom_id];
39 
40 	if (bootdevice_ofpath)
41 		debug("%s: brom_bootdevice_id %x maps to '%s'\n",
42 		      __func__, bootdevice_brom_id, bootdevice_ofpath);
43 	else
44 		debug("%s: failed to resolve brom_bootdevice_id %x\n",
45 		      __func__, bootdevice_brom_id);
46 
47 	return bootdevice_ofpath;
48 }
49 
50 u32 spl_boot_device(void)
51 {
52 	u32 boot_device = BOOT_DEVICE_MMC1;
53 
54 	if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
55 		return BOOT_DEVICE_BOOTROM;
56 
57 	return boot_device;
58 }
59 
60 const char *spl_decode_boot_device(u32 boot_device)
61 {
62 	int i;
63 	static const struct {
64 		u32 boot_device;
65 		const char *ofpath;
66 	} spl_boot_devices_tbl[] = {
67 		{ BOOT_DEVICE_MMC1, "/dwmmc@fe320000" },
68 		{ BOOT_DEVICE_MMC2, "/sdhci@fe330000" },
69 		{ BOOT_DEVICE_SPI, "/spi@ff1d0000" },
70 	};
71 
72 	for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
73 		if (spl_boot_devices_tbl[i].boot_device == boot_device)
74 			return spl_boot_devices_tbl[i].ofpath;
75 
76 	return NULL;
77 }
78 
79 void spl_perform_fixups(struct spl_image_info *spl_image)
80 {
81 	void *blob = spl_image->fdt_addr;
82 	const char *boot_ofpath;
83 	int chosen;
84 
85 	/*
86 	 * Inject the ofpath of the device the full U-Boot (or Linux in
87 	 * Falcon-mode) was booted from into the FDT, if a FDT has been
88 	 * loaded at the same time.
89 	 */
90 	if (!blob)
91 		return;
92 
93 	boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
94 	if (!boot_ofpath) {
95 		pr_err("%s: could not map boot_device to ofpath\n", __func__);
96 		return;
97 	}
98 
99 	chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
100 	if (chosen < 0) {
101 		pr_err("%s: could not find/create '/chosen'\n", __func__);
102 		return;
103 	}
104 	fdt_setprop_string(blob, chosen,
105 			   "u-boot,spl-boot-device", boot_ofpath);
106 }
107 
108 #define TIMER_CHN10_BASE	0xff8680a0
109 #define TIMER_END_COUNT_L	0x00
110 #define TIMER_END_COUNT_H	0x04
111 #define TIMER_INIT_COUNT_L	0x10
112 #define TIMER_INIT_COUNT_H	0x14
113 #define TIMER_CONTROL_REG	0x1c
114 
115 #define TIMER_EN	0x1
116 #define	TIMER_FMODE	(0 << 1)
117 #define	TIMER_RMODE	(1 << 1)
118 
119 void secure_timer_init(void)
120 {
121 	writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_L);
122 	writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_H);
123 	writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L);
124 	writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H);
125 	writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
126 }
127 
128 void board_debug_uart_init(void)
129 {
130 #define GRF_BASE	0xff770000
131 	struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
132 
133 #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
134 	/* Enable early UART0 on the RK3399 */
135 	rk_clrsetreg(&grf->gpio2c_iomux,
136 		     GRF_GPIO2C0_SEL_MASK,
137 		     GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);
138 	rk_clrsetreg(&grf->gpio2c_iomux,
139 		     GRF_GPIO2C1_SEL_MASK,
140 		     GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);
141 #else
142 	/* Enable early UART2 channel C on the RK3399 */
143 	rk_clrsetreg(&grf->gpio4c_iomux,
144 		     GRF_GPIO4C3_SEL_MASK,
145 		     GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
146 	rk_clrsetreg(&grf->gpio4c_iomux,
147 		     GRF_GPIO4C4_SEL_MASK,
148 		     GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
149 	/* Set channel C as UART2 input */
150 	rk_clrsetreg(&grf->soc_con7,
151 		     GRF_UART_DBG_SEL_MASK,
152 		     GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
153 #endif
154 }
155 
156 void board_init_f(ulong dummy)
157 {
158 	struct udevice *pinctrl;
159 	struct udevice *dev;
160 	struct rk3399_pmusgrf_regs *sgrf;
161 	struct rk3399_grf_regs *grf;
162 	int ret;
163 
164 #define EARLY_UART
165 #ifdef EARLY_UART
166 	/*
167 	 * Debug UART can be used from here if required:
168 	 *
169 	 * debug_uart_init();
170 	 * printch('a');
171 	 * printhex8(0x1234);
172 	 * printascii("string");
173 	 */
174 	debug_uart_init();
175 	printascii("U-Boot SPL board init\n");
176 #endif
177 
178 	ret = spl_early_init();
179 	if (ret) {
180 		debug("spl_early_init() failed: %d\n", ret);
181 		hang();
182 	}
183 
184 	/*
185 	 * Disable DDR and SRAM security regions.
186 	 *
187 	 * As we are entered from the BootROM, the region from
188 	 * 0x0 through 0xfffff (i.e. the first MB of memory) will
189 	 * be protected. This will cause issues with the DW_MMC
190 	 * driver, which tries to DMA from/to the stack (likely)
191 	 * located in this range.
192 	 */
193 	sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF);
194 	rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
195 	rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
196 
197 	/*  eMMC clock generator: disable the clock multipilier */
198 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
199 	rk_clrreg(&grf->emmccore_con[11], 0x0ff);
200 
201 	secure_timer_init();
202 
203 	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
204 	if (ret) {
205 		pr_err("Pinctrl init failed: %d\n", ret);
206 		return;
207 	}
208 
209 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
210 	if (ret) {
211 		pr_err("DRAM init failed: %d\n", ret);
212 		return;
213 	}
214 }
215 
216 #ifdef CONFIG_SPL_LOAD_FIT
217 int board_fit_config_name_match(const char *name)
218 {
219 	/* Just empty function now - can't decide what to choose */
220 	debug("%s: %s\n", __func__, name);
221 
222 	return 0;
223 }
224 #endif
225