1 /* 2 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <asm/arch/clock.h> 9 #include <debug_uart.h> 10 #include <dm.h> 11 #include <ram.h> 12 #include <spl.h> 13 #include <asm/io.h> 14 #include <asm/arch/bootrom.h> 15 #include <asm/arch/cru_rk3368.h> 16 #include <asm/arch/grf_rk3368.h> 17 #include <asm/arch/hardware.h> 18 #include <asm/arch/timer.h> 19 #include <syscon.h> 20 21 /* 22 * The SPL (and also the full U-Boot stage on the RK3368) will run in 23 * secure mode (i.e. EL3) and an ATF will eventually be booted before 24 * starting up the operating system... so we can initialize the SGRF 25 * here and rely on the ATF installing the final (secure) policy 26 * later. 27 */ 28 static inline uintptr_t sgrf_soc_con_addr(unsigned no) 29 { 30 const uintptr_t SGRF_BASE = 31 (uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF); 32 33 return SGRF_BASE + sizeof(u32) * no; 34 } 35 36 static inline uintptr_t sgrf_busdmac_addr(unsigned no) 37 { 38 const uintptr_t SGRF_BASE = 39 (uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF); 40 const uintptr_t SGRF_BUSDMAC_OFFSET = 0x100; 41 const uintptr_t SGRF_BUSDMAC_BASE = SGRF_BASE + SGRF_BUSDMAC_OFFSET; 42 43 return SGRF_BUSDMAC_BASE + sizeof(u32) * no; 44 } 45 46 static void sgrf_init(void) 47 { 48 struct rk3368_cru * const cru = 49 (struct rk3368_cru * const)rockchip_get_cru(); 50 const u16 SGRF_SOC_CON_SEC = GENMASK(15, 0); 51 const u16 SGRF_BUSDMAC_CON0_SEC = BIT(2); 52 const u16 SGRF_BUSDMAC_CON1_SEC = GENMASK(15, 12); 53 54 /* Set all configurable IP to 'non secure'-mode */ 55 rk_setreg(sgrf_soc_con_addr(5), SGRF_SOC_CON_SEC); 56 rk_setreg(sgrf_soc_con_addr(6), SGRF_SOC_CON_SEC); 57 rk_setreg(sgrf_soc_con_addr(7), SGRF_SOC_CON_SEC); 58 59 /* 60 * From rockchip-uboot/arch/arm/cpu/armv8/rk33xx/cpu.c 61 * Original comment: "ddr space set no secure mode" 62 */ 63 rk_clrreg(sgrf_soc_con_addr(8), SGRF_SOC_CON_SEC); 64 rk_clrreg(sgrf_soc_con_addr(9), SGRF_SOC_CON_SEC); 65 rk_clrreg(sgrf_soc_con_addr(10), SGRF_SOC_CON_SEC); 66 67 /* Set 'secure dma' to 'non secure'-mode */ 68 rk_setreg(sgrf_busdmac_addr(0), SGRF_BUSDMAC_CON0_SEC); 69 rk_setreg(sgrf_busdmac_addr(1), SGRF_BUSDMAC_CON1_SEC); 70 71 dsb(); /* barrier */ 72 73 rk_setreg(&cru->softrst_con[1], DMA1_SRST_REQ); 74 rk_setreg(&cru->softrst_con[4], DMA2_SRST_REQ); 75 76 dsb(); /* barrier */ 77 udelay(10); 78 79 rk_clrreg(&cru->softrst_con[1], DMA1_SRST_REQ); 80 rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ); 81 } 82 83 void board_debug_uart_init(void) 84 { 85 /* 86 * N.B.: This is called before the device-model has been 87 * initialised. For this reason, we can not access 88 * the GRF address range using the syscon API. 89 */ 90 struct rk3368_grf * const grf = 91 (struct rk3368_grf * const)0xff770000; 92 93 enum { 94 GPIO2D1_MASK = GENMASK(3, 2), 95 GPIO2D1_GPIO = 0, 96 GPIO2D1_UART0_SOUT = (1 << 2), 97 98 GPIO2D0_MASK = GENMASK(1, 0), 99 GPIO2D0_GPIO = 0, 100 GPIO2D0_UART0_SIN = (1 << 0), 101 }; 102 103 #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000) 104 /* Enable early UART0 on the RK3368 */ 105 rk_clrsetreg(&grf->gpio2d_iomux, 106 GPIO2D0_MASK, GPIO2D0_UART0_SIN); 107 rk_clrsetreg(&grf->gpio2d_iomux, 108 GPIO2D1_MASK, GPIO2D1_UART0_SOUT); 109 #endif 110 } 111 112 void board_init_f(ulong dummy) 113 { 114 struct udevice *dev; 115 int ret; 116 117 #define EARLY_UART 118 #ifdef EARLY_UART 119 /* 120 * Debug UART can be used from here if required: 121 * 122 * debug_uart_init(); 123 * printch('a'); 124 * printhex8(0x1234); 125 * printascii("string"); 126 */ 127 debug_uart_init(); 128 printascii("U-Boot TPL board init\n"); 129 #endif 130 131 ret = spl_early_init(); 132 if (ret) { 133 debug("spl_early_init() failed: %d\n", ret); 134 hang(); 135 } 136 137 /* Reset security, so we can use DMA in the MMC drivers */ 138 sgrf_init(); 139 140 ret = uclass_get_device(UCLASS_RAM, 0, &dev); 141 if (ret) { 142 debug("DRAM init failed: %d\n", ret); 143 return; 144 } 145 } 146 147 void board_return_to_bootrom(void) 148 { 149 back_to_bootrom(BROM_BOOT_NEXTSTAGE); 150 } 151 152 u32 spl_boot_device(void) 153 { 154 return BOOT_DEVICE_BOOTROM; 155 } 156